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MVME4100 Single Board Computer Programmer’s Reference (6806800H19D)
Register Descriptions
Register Descriptions
3.1.9
NAND Flash Chip 1 Control Register
The MVME4100 provides a Control Register for the NAND Flash device.
Table 3-11
PCI Bus 3 Status Register
REG
PCI Bus 3 Status Register - 0xF200 000A
BIT
7
6
5
4
3
2
1
0
Field
RSVD
RSVD
RSVD
RSVD
PCI_3_64B
PCIX_3
PCI_3_SPD
OPER
R
R
R
R
R
R
R
R
RESET
0
0
0
0
0
0
0
0
PCI_3_SPD
PCI Bus 3 Speed. Indicates the frequency of PCI bus 3.
00: 33 MHz
01: 66 MHz
10: 100 MHz
11: 133 MHz
PCIX_3
PCI-X Bus 3. A set condition indicates that bus 3 is operating in PCI-X mode.
Cleared indicates PCI mode.
PCI_3_64B
PCI Bus 3 64-bit. A set condition indicates that bus 3 is enabled to operate in 64-
bit mode. Cleared indicates 32-bit mode.
RSVD
Reserved for future implementation.
Table 3-12
NAND Flash Chip 1 Control Register
REG
NAND Flash Chip 1 Control Register - 0xF200 0010
BIT
7
6
5
4
3
2
1
0
Field
CLE
ALE
WP
RSVD
RSVD
RSVD
RSVD
RSVD
OPER
R/W
R
RESET
0
0
1
0
0
0
0
0
Summary of Contents for MVME4100
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