8.4 Output Signal Format
The differential output swing and common mode voltage are both fully programmable covering a wide variety of signal formats including
LVDS, LVPECL, and HCSL. For CML applications, see Section
8.4.9 Setting the Differential Output Driver to Non-Standard Amplitudes
.
The differential formats can be either normal or low power. Low power format uses less power for the same amplitude but has the
drawback of slower rise/fall times. The source impedance in low power format is much higher than 100 Ω. See Section
the Differential Output Driver to Non-Standard Amplitudes
for register settings to implement variable amplitude differential outputs. In
addition to supporting differential signals, any of the outputs can be configured as LVCMOS (3.3, 2.5, or 1.8 V) drivers providing up to
8 (for the Si5391) single-ended outputs, or any combination of differential and single-ended outputs. Note also that CMOS output can
create much more crosstalk than differential outputs so extra care must be taken in their pin replacement so that other clocks that need
the lowest jitter are not on nearby pins. See
AN862: Optimizing Jitter Performance in Next Generation Internet Infrastructure Systems
for additional information.
Table 8.3. Output Signal Format Control Registers
Setting Name
Hex Address [Bit Field]
Function
Si5391/Si5391P
OUT0A_FORMAT
0104[2:0]
Selects the output signal format as normal differential, low power differential, in
phase CMOS, or complementary CMOS.
OUT0_FORMAT
0109[2:0]
OUT1_FORMAT
010E[2:0]
OUT2_FORMAT
0113[2:0]
OUT3_FORMAT
0118[2:0]
OUT4_FORMAT
011D[2:0]
OUT5_FORMAT
0122[2:0]
OUT6_FORMAT
0127[2:0]
OUT7_FORMAT
012C[2:0]
OUT8_FORMAT
0131[2:0]
OUT9_FORMAT
0136[2:0]
OUT9A_FORMAT
013B[2:0]
Si5391 Reference Manual • Outputs
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • [email protected] • www.skyworksinc.com
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Rev. 0.5 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • January 11, 2022
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