Silicon Laboratories UDP C8051F370, User Manual

Page: 25 / 38

C 8 0 5 1 F 3 9 x / F 3 7 x
Rev. 0.2 25
A
PPENDIX
—MCU C
ARD
H
EADER
P
IN
D
ESCRIPTIONS
Table 3. UDP C8051F390/F370 MCU Card H1 Pin Descriptions
MCU Card
Pin
Signal Name Usage
1 GND
2 USART_TX_A
3 USART_RX_A
4 USART_RTS_A
5 USART_CTS_A
6 USART_UCLK_A
7 CAN_TX_B
8 CAN_RX_B
9 SPI_SCK_A SPI0 clock
10 SPI_MISO_A SPI0 master-in, slave-out
11 SPI_MOSI_A SPI0 master-out, slave-in
12 SPI_NSS0_A SPI0 slave select
13 SPI_NSS1_A
14 SPI_NSS2_A
15 SPI_NSS3_A
16 USART_TX_B
17 USART_RX_B
18 USART_RTS_B
19 USART_CTS_B
20 USART_UCLK_B
21 EPCA_ECI_A
22 EPCA_CH0_A
23 EPCA_CH1_A
24 EPCA_CH2_A
25 EPCA_CH3_A
26 EPCA_CH4_A
27 EPCA_CH5_A
28 LIN_TX_A
29 LIN_RX_A
30 PCA_ECI_A PCA0 external clock input
31 PCA_CH0_A PCA0 channel 0
32 PCA_CH1_A PCA0 channel 1
33 PCA_ECI_B
34 PCA_CH0_B PCA0 channel 2
35 PCA_CH1_B
36 I2SOUT_DFS_A