S i 2 4 9 3 / 5 7 / 3 4 / 1 5 / 0 4
Rev. 0.6
17
TXCLK_H
R
E
S
ETb
DC
D
_
H
AO
UT
_H
DC
D
_
H
EE
S
D
_
H
TXCLK_H
R
E
S
ETb
R
E
S
ETb
EE
S
D
_
H
AO
UT
_H
VD
+3
.3
V
+3.
3V
VCC
VCC
VD
+3
.3
V
USB
R
S
-232
"
7
-
12V AC or DC"
"
RESET"
JP7
for measuring
curr
ent to modem (i.e.
V
D
g
oes to modem only)
"
Mux off"
"
USB"
Info
Info
Ctrl
Ctrl
Info
G
P
IO4 or AOUT
I
N
T
or AOUT
n
c
or GPIO4
Table o
n
silkscreen for JP6
R
S-232
S
i
2400 only
S
i2456/57
S
i2401
CD
n
c
or GPIO2
D
C
D
or EEIO
G
P
IO2 or nc
RI
G
P
IO3 or nc
R
I
or TXCLK
n
c
or GPIO5
DTR
E
SC or X
G
P
IO3 or nc
RTS
C
L
KOUT or nc
R
T
S
or RXCLK
n
c
or GPIO1
DSR
F
unction
"
RXD"
"
TXD"
"
CTSb"
"
RESETb"
"
RTSb"
"
DCDb"
"
INT"
"
AOUT"
"
RIb"
"
ESC"
P
l
a
ce White Dot
S
i
l
kscreen Near
P
in 1
"
CLKOUT"
"
TXCLK"
"
RXCLK"
"
EESD"
G
P
IO1 or GPIO3
"Si2401:
1-2, 5-6, 7-8, 11-12, 14-15"
"Si2400:
2-3, 4-5, 8-9, 11-12, 13-14"
"Si24xx:
1-2, 4-5, 7-8, 10-11, 13-14"
"Si24xx
alt: 1-2, 5-6, 7-8, 11-12, 14-15"
"JP6:
recommended settings"
P
l
a
ce White Dot
S
i
l
kscreen Near
P
in 1
Right a
ngle connector on board edge
Si24x
x
Reset Options
"
A
UTOBAUD"
"
EEPROM"
"
2
7MHz CLK"
"
RING"
"
TIP"
"
PCM"
"
EEPROM"
"
S
i
2401 27MHz CLK"
Si240
1
Reset Options
JP
7
JP
5
R9
0
B4
UA
R
T
M
u
x
TXD_T
RTS_T
DTR_T
TXD_U
RTS_U
DTR_U
RXD_M
CTS_M
DSR_M
CD_M
RI_M
RXD_T
CTS_T
DSR_T
CD_T
RI_T
RXD_U
CTS_U
DSR_U
CD_U
RI_U
TXD_M
DTR_M
RTS_M
OE
S
JP
1
1
R6
0
R1
1
10
k
JP
3
H
EAD
E
R
8
X
2
1
3
5
7
9
11
13
15
2
4
6
8
10
12
14
16
R1
0
NI
JP
13
JP
6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R2
LS1
S
peaker
B1
R
S
-232
RXD_T
CTS_T
RTS_T
DTR_T
DSR_T
CD_T
RI_T
TXD_R
DTR_R
DSR_R
RXD_R
RD_R
CD_R
CTS_R
TXD_T
RTS_R
C3
2
J3
Po
we
r Connect
or
1
2
J5
U
SB Ty
p
e
B
1
2
3
4
5
R7
0
B2
US
B
RXD_U
CTS_U
DSR_U
CD_U
RI_U
TXD_U
RTS_R
DTR_U
USB-
USB+
R1
2
10
k
TP
7
R8
1.
3
k
J4
2.1
mm P
o
w
e
r j
a
ck
1
2
B5
D
aught
er Card S
o
cket
RXD_H
CTS_H
RESET_H
RI_H
DCD_H
AOUT_H
RING
TIP
TXD_H
ESC_H
RTS_H
CLKOUT_H
INT_H
EESD_H
TXCLK_H
RXCLK_H
EESD_H
EECS_H
EECLK_H
R10
10k
S1
SW PU
SHBU
TTON
B6
S
peaker
AOUT
SPEAKER
J1
D
B
9-RS
232_1
CD(o)
1
RXD(o)
2
TXD(i)
3
DTR(i)
4
SG
5
DSR(o)
6
RTS(i)
7
CTS(o)
8
RD(o)
9
M2
11
M1
10
J2
RCA
J
A
C
K
NI
R2
7
0
JP
4
H
EAD
ER 5
X
2
1
2
3
4
5
6
7
8
9
10
R2
8
10
k
JP
9
JP
8
U9
CS
1
SDO
2
SDI
5
HOLD
7
SCLK
6
WP
3
VCC
8
TP
8
B3
Po
we
rB
lo
c
k
V1
V2
USB_+5
RESET
RJ11
1
2
3
4
5
6
7
8
9
10
11
12
JP
10
JP
1
2
Figur
e
13.
Mot
h
er
boar
d
T
op-
leve
l Sch
e
mat
ic
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