
EM358x
Rev 1.0
7
Table 6.1. EM358x Pin Descriptions
Pin #
Signal
Direction
Description
1 VDD_24MHZ Power
1.8
V
high-frequency oscillator supply
2 VDD_VCO Power
1.8
V
VCO
supply
3
RF_P
I/O Differential
(with
RF_N)
receiver
input/transmitter
output
4
RF_N
I/O Differential
(with
RF_P)
receiver
input/transmitter
output
5
VDD_RF
Power
1.8 V RF supply (LNA and PA)
6 RF_TX_ALT_P O
Differential (with RF_TX_ALT_N) transmitter output (optional)
7 RF_TX_ALT_N O
Differential (with RF_TX_ALT_P) transmitter output (optional)
8
VDD_IF
Power
1.8 V IF supply (mixers and filters)
9
NC
Do not connect
10
VDD_PADSA
Power
Analog pad supply (1.8 V)
11
PC5
I/O Digital
I/O
TX_ACTIVE
O
Logic-level control for external RX/TX switch. The EM358x baseband con-
trols TX_ACTIVE and drives it high (VDD_PADS) when in TX mode.
Select alternate output function with GPIO_PCCFGH[7:4]
12 nRESET
I
Active low chip reset (internal pull-up)
13
PC6
I/O Digital
I/O
OSC32B
I/O 32.768
kHz
crystal
oscillator
Select analog function with GPIO_PCCFGH[11:8]
nTX_ACTIVE
O
Inverted TX_ACTIVE signal (see PC5)
Select alternate output function with GPIO_PCCFGH[11:8]
14
PC7
I/O Digital
I/O
OSC32A
I/O 32.768
kHz
crystal
oscillator
Select analog function with GPIO_PCCFGH[15:12]
OSC32_EXT
I
Digital 32.768 kHz clock input source
15
VREG_OUT
Power
Regulator output (1.8 V while awake, 0 V during deep sleep)
16 VDD_PADS Power
Pads
supply
(2.1–3.6
V)
17
VDD_CORE
Power
1.25 V digital core supply decoupling
Note:
1.
IRQC and IRQD external interrupts can be mapped to any digital I/O pin using the GPIO_IRQCSEL and
GPIO_IRQDSEL registers.