SiFive HiFive Unleashed, Getting Started Manual

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Both ROM1 and the FSBL find the next boot loader stage based on the MSEL setting. All possi-
ble values are enumerated below. The three SPI interfaces on the Freedom U500 SoC can be
used to download media either from SPI flash (using x4 data pins or x1) or an SD card, using
the SPI protocol. ROM1 downloads the FSBL at 10MHz, while the FSBL uses 50MHz for SPI
and 20MHz for SD.
MSEL FSBL BBL Purpose
0000 - - loops forever waiting for debugger
0001 - - jump directly to 0x2000_0000 (memory-mapped SPI0)
0010 - - jump directly to 0x3000_0000 (memory-mapped SPI1)
0011 - - jump directly to 0x4000_0000 (uncached ChipLink)
0100 - - jump directly to 0x6000_0000 (cached ChipLink)
0101 SPI0 x1 SPI0 x1 -
0110 SPI0 x4 SPI0 x4 Rescue image from flash (preprogrammed)
0111 SPI1 x4 SPI1 x4 -
1000 SPI1 SD SPI1 SD -
1001 SPI2 x1 SPI2 x1 -
1010 SPI0 x4 SPI1 SD -
1011 SPI2 SD SPI2 SD Rescue image from SD card
1100 SPI1 x1 SPI2 SD -
1101 SPI1 x4 SPI2 SD -
1110 SPI0 x1 SPI2 SD -
1111 SPI0 x4 SPI2 SD Default boot mode
Table 1: MSEL Boot Mode Straps
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