Siemens SlMATlC S5-010W Operating Instructions Manual Download Page 6 | Manualshive

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Summary of Contents for SlMATlC S5-010W

Page 1: ...e Controller S5 010W Manual Order No 6ES5 998 OCA21 Issue 1 lnstructions Contents Instructions Programming Instructions Programming lnstructions Order No GWA 4NEB 807 1021 02 GWA4NEB 807 1071 02 SIEMENS AKTIENGESELLSCHAFT ...

Page 2: ...SIMATICS5 O10W Programmable Controller Operating Instructions ...

Page 3: ...coding jumpers 1 1 Application 1 2 Construction 1 3 Principle of operation 1 4 Technical specification 2 2 and 3 4 to 8 9 and 10 4 Maintenance 2 Installation 4 1 Changing the lithium battery 4 2 Testing and troubleshooting 2 1 Mechanical design 2 2 Connecting the power supplies 2 3 Connecting the signal leads 2 4 Electrical design 2 5 General 2 6 Dimensions 5 Appendix 5 1 Pin assignments 5 2 Memor...

Page 4: ...X 250 mm Each PCB represents a functional unit k 1 The modules are housed in an open frame and are interconnected through a 20 way bus which is secured to the rear of the housing The housing frame permits easy mounting in electronic equipment cabinets and machine tools no fan is needed There are three types of housing available on with four one with six and one with eight module locations Central ...

Page 5: ... module locations Analogtimers 4 Inputs 40 Outputs 56 EPROM l p 4 I I I PU interface module L PC with six module locations EPROM Analogtimers 8 Outputs 84 I 1 i l I I PU interface module L EPROM I 1 PC with six module locations Analogtimers 8 Inputs 80 Outputs 84 l I I PU interface module L EPROM 3 7 4 l l I L PU interface module l PC with etght module locat ons Analogtimers 12 Inputs 120 Outputs ...

Page 6: ... and holds all output modules disabled via the enabling bus In conjunction with the full parameter therefore input 5 1 is specified and can be examined pending on the signal status at the input of this element either 1 or 0 is transmitted on the input data bus DIN to the sequence logic unit of the processor for further processing From the bit pattern for the letter A in the operation AI A AND the ...

Page 7: ...This will ensure that all outputs assume the logic state 0 during a scan fault Memory for flag operations A 1024 X 1 bit static RAM is used for flag operations The memory is subdivided into three areas see Fig 7 Retentive flags These flags are addressed by the operations SF RF F etc The flag area has battery backup i e the flags retain their signal statuses in the event of power failure The batter...

Page 8: ...neity factor 50 4 outputs 24 V DC12 A Each of the 0 8 A outputs is electronically protected against short circuit Extra fast fuses FF 2 51250 G are fitted for protecting the 2 A outputs The voltage induced when disconnecting inductive loads is limited to 15 V by internal suppression elements With inductive loading and rated current the maximum switching frequency is 1 Hz Higher switching frequenci...

Page 9: ... arrangement of the peripheral In addition to these 21 signal lines a further two are needed for the bus is possible and may be the better solution for many applica 24 V supply so that a 24 core SlMATlC cable can be used tions It avoids for example having to shut down all the S5 010 PCs when changing modules in only one of them Fig 10 Interfacingup to 1555 010 Wprogrammable controllers to a master...

Page 10: ...throughput The interrupt is generated when the S5 010 receives the output data frorn the master PC Cyclic execution of the STEP 5 program of the 55 010 controlier is interrupted and the processor returns to the beginning of the program The first statements of the STEP 5 program are used for interrupt processing which needs a time of T n X 20 ps After time TB tK t t input delay of interface module ...

Page 11: ... life 20 us Installation in control cabinets e g 19 or on a vertical mounting surface Execution time per statement Ambient temperature range 0 55 C Cycle monitoring time 200 ms 24 V DC 20 30 V max 800 mA Storage temperature 40 85 C Supply voltage Humidity rating F to DIN 40040 Altitude rating S to DIN 40040 Current cor sumption of CPU Mechanical stressing Test voltage VDE 0160 VDE 01l 0 Vibration ...

Page 12: ... supply voltage inputs outputs of a module to each other 10 INTERFACE MODULE 6ES5772 OM12 Rated output voltage 2 4 V D C 2 4 V D C Delay time No of inputs 8 8 S2 On Max lead length in live cable5 at Off Voltage ranges floating Rated input voltage 24 V Insulation6 1 5 6 5ms Max output current at 1 signal 2 A 2 A 0 8 A Min 2 0 V D C 2OVDC for rated value 3 6 V D C 24 48 V ACIDC 1OOOm Max 3 0 V D C 3...

Page 13: ...ntified for the following standard configurations CPU Central processing unit IIT Inputltimer module RB Suitable for interfacing module 0 Output module 2 2 Connecting the power supplies CPU The power supply and watchdog monitor are connected by tab Fig 14 Installing the housing connectors for quick connect terminals 6 3 mm or 2 X 2 8 mm Terminal identification 2 1 Power supply Floating contact ope...

Page 14: ...d components must not be touched with bare hands handle modules by means of the edge connector only Persons intending to handle the modules must discharge them selves to frame potential before touching the modules The housing of the S5 010 is attached to the mounting plate by means of serrated washers which eliminate the need for a ground wire connection Fig 17 Inserting a front connectof 24 V and...

Page 15: ...Dimensions M6 fixing Fig 18 S5 010Wprogrammable controller for four modules l M6 fixing screw Fig 19 S5 010Wprogrammable controller for six modules M6 f x n g screw Fig 20 S5 010W programmable controller for e ght modules ...

Page 16: ...s of the I O modulesare reset R retentive NR non retentive switch In the event of a power failure the flag area FmP I F3F 7 F63 7 either has battery backup positionR or not position NR Memory address thumbwheel switch When an address is selected in the program memory by means of the thumbwheel switch the signal status and the result of the logic operation RLO of the corresponding STEP 5 statement ...

Page 17: ...ternal potentiometer to series connection Fig 22 Controls for time setting Fig 23 lumper assignment of the memory submodule to suit the various EPROMs 3 3 Programming The S5 010W programmable controller is programmed in the STEP 5 language see Programming Instructions for the S5 010 When using the 610 programming unit the first four memory loca tions must be left free if there is to be subsequent ...

Page 18: ...ep LED display remove the soldered jumper FG service panel Checking the power supplies Permitted tolerance of 24 V supply 20 30 V DC Maximum ripple content 5 Note Check carefully that there are no connections to circuits of higher voitages Inputltimer module The pulse edge for interrupt initiation can be adjusted for ail four interrupt inputs together Soldered jumper EF pulse edge Soldered jumper ...

Page 19: ...3 Operation 3 5 lumper settings on the modules Address decrodiny Fig 25 lumper assignment and posi ioi s 3 1 he DIL switches o ine inputltimer nodule Fig 26 Jumper assignment on the interface module ...

Page 20: ...umper settings on the modules Address decodiqg C A B Fuses FF2X 5 0 0 Fig 27 Jumper assignment and fuses on the output module OM12 Address decoding c A B Fig 28 Jumper assignment and fuses on the output module 0 AA41 18 ...

Page 21: ...I H 1 24 1 24 1 1 25 0 25 3 1 25 4 31 7 I dec hex dec I I I Digital output module 6ES541O OAAI 1 12 01 4 05 7 01 4 05 7 a hex dec I I I Digital output module 6ES5410 OAA41 0 I Coding jumpers 1 2 A outputs I 0 8 A outputs B A C I 00 1 00 4 00 1 00 4 09 0 09 3 09 0 09 3 08 1 08 4 08 1 08 4 0 I Coding jumpers B A C A 1 01 0 01 3 01 0 01 3 09 4 0D 7 09 4 13 7 11 0 11 3 17 0 17 3 10 1 10 4 16 1 16 4 01...

Page 22: ... housing cover 6 Take out the CPU 7 Detach the terminal connectors remove the old battery fit the new battery replace the connectors 8 Replace the CPU 9 Replace the housing cover and screw tight 10 Plug in the power supply cable 11 Insert the EPROM submodule 12 Switch on the 24 V power supply 13 Set the mode selector switch to Run It is essential to use the correct type of battery specified 4 2 Te...

Page 23: ...eometricalarrangement are shown in Fig 30 The correlation between connector pins and inputloutput addresses without coding jumpers is shown in the following tables Input timer module 6ES5400 OAA11 Digital output module 6ES54104AA41 Pin 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 Pin d b z Q0 Q 1 Q2 Q3 Q4 Q5 Q6 16 1 7 Q7 b 102 0 102 1 102 2 102 3 102 4 102 5 102 6 102 7 M M d 101 0 101 1 101 2 101 ...

Page 24: ...tements K6 Battery test pin VKE Result of logic operation RLO STAT Signal status of I10 modules W Block end RIA Initializing pulse request fS Stop clock Text External clock TI Basic clocking of CPU NOP No oweration test module 1 e NOP 3 Stop address counter FP FR Enable I10 or RAM Rio Internal initializing pulse 15 STOP ScanIStop l e Stop VPP Power supply for readout 5 V and programming 16 25 V of...

Page 25: ...5 Appendix 5 4 S5 010 machine code S5 010 machine code Control signals ...

Page 26: ...s for wire cross sections of 0 09 0 15 mmi 0 14 0 5 mm2 0 75 1 5 mm2 Socket connector model F for manually soldered connections 48 way Inputltimer module 40 inputs 24 V and 4 analog timers Digital output module 24 V DC 24 outputs 0 8 A current limited 4 outputs 2 0 A HARTINGconnectors for I10 modules 12 outputs 0 8 A current limited 4 outputs 2 0 A Connector shell wide Latching bar left right Digi...

Page 27: ...SiemensAktiengesellschaft Subject to change without prior notice Order No GWA 4NEB 807 1021 02 Printed in the FederalRepublicof Germany AG 184 1 E 24 en ...

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