Monitoring and Testing the Sequential Control System
S7-GRAPH for S7-300/400 Programming Sequential Control Systems
C79000-G7076-C526-01
11-3
-
The display indicates whether individual conditions are satisfied (for example
a memory bit or an output).
-
The display indicates whether a complete logic operation consisting of
several conditions is satisfied, for example an OR operation.
-
The display indicates whether the entire transition (T), interlock (C) or
supervision (V) is satisfied.
Cond.1
Cond.2
The transition is satisfied and switches
Cond.1
Cond.
2
The transition is not satisfied and does not switch
satisfied
Not satisfied
satisfied
satisfied
Status Display for the Signal State of Address
In steps, the signal states of the programmed actions are displayed. The signal
state of the addresses (for example inputs, outputs, memory bits) is determined by
the actual query of the individual action. This means it is not purely a step-specific
evaluation. Boolean addresses are displayed in this status display.
If there are block calls within the actions, there is no status display.
N
S1 S
A 4.2
A 4.3
S4
S0 R
A 4.4
Step is active
Sequence of
execution
Signal state
1
1
0
11.1.2
Control Sequencer
Control Sequencer is a test function with which you can test the sequencer with
S7-Graph in all modes. All the settings and entries for the dialog box have the
same effect as the corresponding FB parameters.
The entries in the "Sequencer Control" dialog box can be different from the settings
you used to compile the sequencers. The dialog box settings have priority.