User's Manual 23
Passive Release
When enabled, the chipset provides a programmable passive release mechanism to meet
the required ISA master latencies.
Delayed Transaction
Since the 2.1 revision of the PCI specification requires much tighter controls on target and
master latency. PCI cycles to or from ISA typically take longer. When enabled, the chipset
provides a programmable delayed completion mechanism to meet the required target
latencies.