LD-14115-5
4-2
Interface block diagram
Using receiver
：
Contained in a control IC.
Corresponding Transmitter
：
THC63LVDM83R(THine electronics),DS90C383,DS90C383A(National semiconductor)
GA0
～
GA7
BA0
～
BA7
DEA
RA0
～
RA7
RB0
～
RB7
BB0
～
BB7
GB0
～
GB7
TTL parallel
→
LVDS
RAIN0+(5)
RAIN0-(6)
8
8
8
PLL
8
8
8
Controller
PLL
LVDS
→
TTL parallel
LVDS
→
TTL parallel
PLL
PLL
RAIN
1
+(8)
RAIN
1
-(9)
RAIN2-(
1
2)
RBIN0+(5)
RBIN0-(6)
RBIN
1
+(8)
RBIN
1
-(9)
RBIN2+(
11
)
RBIN2-(
1
2)
(
1
4)
RBCLKIN-(
1
5)
8
8
8
8
8
8
DEA
RB0
～
RB7
BB0
～
BB7
GB0
～
GB7
Internal circuits
CLK
CLK
（
Computer side
）
A Port
B Port
(TFT-LCD side)
TxIN
1
8~20
RAIN3+(
1
7)
RAIN3-(
1
8)
RBIN3+(
1
7)
RBIN3-(
1
8)
RAIN2+(
11
)
(
1
4)
RACLKIN-(
1
5)
TTL parallel
→
LVDS
RA0
～
RA7
BA0
～
BA7
GA0
～
GA7
DEB
DEB
