DV-SL800W
59
Symbol
Pin NO
I/O
Description
R_D5
147
I/O
ROM / SRAM / flash data bus bit [5]
R_D4
148
I/O
ROM / SRAM / flash data bus bit [4]
R_D3
149
I/O
ROM / SRAM / flash data bus bit [3]
VSS_O5/VSS_K5
150
S
Kernel logic / I/O power shared ground supply #5
R_D2
151
I/O
ROM / SRAM / flash data bus bit [2]
R_D1
152
I/O
ROM / SRAM / flash data bus bit [1]
R_D0
153
I/O
ROM / SRAM / flash data bus bit [0]
R_A0
154
O
ROM / SRAM / flash address bus bit [0]
R_A1
155
O
ROM / SRAM / flash address bus bit [1]
R_A2
156
O
ROM / SRAM / flash address bus bit [2]
R_A3
157
O
ROM / SRAM / flash address bus bit [3]
R_A4
158
O
ROM / SRAM / flash address bus bit [4]
R_A5
159
O
ROM / SRAM / flash address bus bit [5]
R_A6
160
O
ROM / SRAM / flash address bus bit [6]
R_A7
161
O
ROM / SRAM / flash address bus bit [7]
R_A12
162
I/O
ROM / SRAM / flash address bus bit [12]
R_A15
163
I/O
ROM / SRAM / flash address bus bit [15]
AIN/AIN_L
164
A
ADC input (left channel)
AIN_R
165
A
ADC input (right channel)
VM
166
A
ADC input voltage reference when not used, connect a 0.1uF to ground.
VDD_ADA
167
S
3.3V power supply for on-chip audio ADC
VSS_ADA
168
S
Ground pin for on-chip audio ADC
R_A16
169
I/O
ROM / SRAM / flash address bus bit [16]
R_A18
170
I/O
ROM / SRAM / flash address bus bit [18]
A_IEC_TX/GPIO
171
I/O
IEC 958 transmit data
A_DATA[0]/GPIO
172
I/O
Serial audio data output for channel 1/0 or GPIO
VDD_O5
173
S
I/O power supply #5
A_DATA[1]/GPIO
174
I/O
Serial audio data output for channel 3/2 or GPIO
A_DATA[2]/GPIO
175
I/O
Serial audio data output for channel 5/4 or GPIO
Priority selection
Function
Dir
sft_cfg3[8]=1'b1
A_IEC_TX (default)
O
sft_cfg8[8]=1'b1
ADC_MONO_C[0]
I
sft_cfg8[9]=1'b1
DAC_OPF[0]
I
(other)
GPIO[52]
I/O
Priority selection
Function
Dir
sft_cfg3[1]=1'b1
A_DATA[0] (default)
O
sft_cfg8[8]=1'b1
ADC_MONO_C[1]
I
sft_cfg8[9]=1'b1
DAC_OPF[1]
I
(other)
GPIO[53]
I/O
Priority selection
Function
Dir
sft_cfg3[2]=1'b1
A_DATA[1] (default)
O
sft_cfg8[8]=1'b1
ADC_MONO_C[2]
I
sft_cfg8[9]=1'b1
DAC_OPF[2]
I
(other)
GPIO[54]
I/O
Priority selection
Function
Dir
sft_cfg3[3]=1'b1
A_DATA[2] (default)
O
sft_cfg8[8]=1'b1
ADC_MONO_PWAD
I
sft_cfg8[9]=1'b1
DAC_PDALL
I
(other)
GPIO[55]
I/O
Summary of Contents for DV-SL800W
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