DV-550U
12-4. IC707 IX1473GE
SERVO PROCCESSOR
Pin No.
Terminal name
I/O
Operation function
Remarks
1
VSS
–
Digital ground terminal.
2
BCK
O
Bit clock (1.4122MHz) output terminal.
3
AOUT
O
Audio data output terminal.
4
DOUT
O
Digital out output terminal.
5
MBOV
O
Buffer memory over signal output terminal. Over: “H”
6
IPF
O
Correction flag output terminal. When correction disable symbol
is given if AOUT output is C2 correction: “H”.
7
SBOK
O
Sub-code Q data CRCC judgment result output terminal.
Judgment result OK: “H”.
8
CLCK
I/O
Sub-code P to W data read clock output/input terminal.
Selectable with command bit.
9
VDD
–
D power terminal
10
VSS
–
Digital ground terminal
11
DATA
O
Sub code P-W data output terminal.
12
SFSY
O
Playback system frame sync signal output terminal.
13
SBSY
O
Subcode block sync output terminal.
When subcode sync is detected, S1 position: “H”.
14
SPCK
O
Processor status signal read clock (176.4 kHz) output terminal.
15
SPDA
O
Processor status signal output terminal.
16
COFS
O
Correction system frame clock (7.35 kHz) output terminal.
17
MONIT
O
LSI internal signal monitor terminal.
DSP internal flag and PLL system clock can be monitored with
microcomputer command.
18
VDD
–
D power terminal.
12-4
Pin No.
Terminal name
I/O
Operation function
45
EQIN
I
DVD/CD-EQ input.
46
EQOUT
O
Output after passing of RFNIN and RFPIN VCA.
47
DVDsel
I
DVD/CD selection control input. H:CD L: DVD (PNP open space)
48
RFGain
I
RF signal VCA control input.
49
VCC3
–
RF system VCC.
50
MDIN
I
Laser diode APC monitor input.
51
LDC
I
LD ON/OFF control input. H:ON, L:OFF
52
LDOUT
O
LD external current driver control output.
53
LDPsel
I
APC control polarity selection input. H: Positive polarity L: Negative polarity.
54
RFPIN
I
RF signal nonreverse input from PU.
55
RFNIN
I
RF signal reverse input from PU.
56
VCC1
–
Servo system VCC.
57
AIN
I
Main beam 4-division detector A input for focus error (FE) generation.
58
BIN
I
Main beam 4-division detector B input for focus error (FE) generation.
59
CIN
I
Main beam 4-division detector C input for focus error (FE) generation.
60
DIN
I
Main beam 4-division detector D input for focus error (FE) generation.
61
VrefIN
I
2.1V reference voltage potential input.
62
EIN
I
Sub-bean E input.
63
FIN
I
Sub-bean F input.
64
S/Dsel
I
Single/double layer system selection input. H: Double layer, L: Single layer
Summary of Contents for DV-550U
Page 5: ...DV 550U 4 1 For details on the use of each control 4 PART NAMES 14 Remote Sensor ...
Page 6: ...DV 550U 4 2 ...
Page 52: ...DV 550U ...
Page 53: ...A B C D E F G H 1 2 3 4 5 6 7 8 9 10 11 12 DV 550U DV 550U 14 1 14 2 14 BLOCK DIAGRAM ...
Page 56: ...U DV 550U 10 11 12 13 14 15 16 17 16 2 ...
Page 58: ...10 11 12 13 14 15 16 17 U DV 550U 16 4 ...
Page 83: ...Ref No Part No Description Code Ref No Part No Description Code 18 19 DV 550U ...