Semtech LoRa Edge LR1110, User Manual

Page: 119 / 130

LR1110
User Manual
Rev.1.0
UM.LR1110.W.APP March 2020
119 of 130
Semtech
www.semtech.com
15. List Of Commands
15.1 Register / Memory Access Operations
15.2 System Configuration / Status Operations
Table 15-1: Register / Memory Access Operations
Command Opcode Parameters Description
WriteRegMem32 0x0105
Addr(31:0)
Data[1..256]
Writes data at given register/memory
address. Address must be 32 bit aligned and
data length must be a multiple of 4.
ReadRegMem32 0x0106
Addr(31:0)
Len(7:0)
Reads data at given register/memory
address. Address must be 32 bit aligned and
data length in word(32bit) < 65
WriteBuffer8 0x0109 Data[1..256] Writes data to radio TXbuffer
ReadBuffer8 0x010A
Offset(7..0)
Len(7:0)
Reads data from radio RX buffer
ClearRxBuffer 0x010B --- Clears all data from the radio RX buffer
WriteRegMemMask32 0x010C
Addr(31:0), Mask(31:0)
Data(31:0)
Read-Modify-Writes data at given
register/memory address. Address must be
32 bit aligned.
Table 15-2: System Configuration / Status Operations
Command Opcode Parameters Description
GetStatus 0x0100 --- Returns status of device
GetVersion 0x0101 --- Returns version of firmware
GetErrors 0x010D --- Returns error status of the device
ClearErrors 0x010E --- Clears error bits in error status
Calibrate 0x010F CalibParams(7:0)
Calibrate the requested blocks according to
parameter
SetRegMode 0x0110 RegMode (0 = LDO, 1 = DC-DC)
Sets if DC-DC may be enabled for XOSC, FS,
RX or TX mode
CalibImage 0x0111
Freq1(7:0)
Freq2(7:0) Launches an image calibration.
Freq1, Freq2, in 4MHz steps
SetDioAsRfSwitch 0x0112
RfswEnable(7:0), RfswStbyCfg(7:0),
RfswRxCfg(7:0), RfswTxCfg(7:0),
RfswTxHPCfg(7:0), RfswTxHFCfg(7:0),
RfswGnssCfg(7:0), RfswWifiCfg(7:0)
Setup the RFSWx outputs configurations for
each radio mode
SetDioIrqParams 0x0113 IrqToEn(31:0), IrqToEn2(31:0) Configures irqs to output on IRQ pin(s)