Q7-C26
Q7-C26 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 Author: A.R - Reviewed by S.R. - Copyright © 2020 SECO S.p.A
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3.2
Connectors description
3.2.1
CSI Camera Connector
NXP i.MX8 Processors include an Imaging Subsystem
capturing the incoming pixel data from multiple input
sources and storing them into the memory. The Imaging
Subsystem consists of the Imaging Sensor Interface (ISI),
MJPEG Encoder and MJPEG Decoder. The pixel data for
the ISI can come from different image input sources, such
as MIPI CSI and HDMI.
The MIPI CSI subsystem of i.MX8 Processors handles the sensor/image input and process for
CSI type input imaging devices. It consists of two MIPI-CSI interfaces that support up to 4 data
lanes. In addition to this, in i.MX8 Processors there is a HDMI Receiver Subsystem capturing
image and sending it to the ISI via the Pixel link interface.
In Q7-C26, there are two MIPI-CSI input interfaces, where the second interface can be
configured via a multiplexer to become an HDMI Input interface.
In case two MIPI-CSI input interfaces are configured, the first one (MIPI-CSI0) is a MIPI-CSI with
4 data lanes and the second one (MIPI-CSI1) is a MIPI-CSI with 2 data lanes.
When one MIPI-CSI and one HDMI input interfaces are configured, the MIPI-CISI has 3 data
lanes.
It is possible to access to the video input port through an FFC/FPC connector, type HIROSE
p/n FH12A-36S-0.5SH(55) which is able to accept 36 poles 0.5mm pitch FFC cables.
The pinout of this connector is shown in the table on the left.
:
MIPI_/ MIPI_CSI0_D0-: CSI0 first input differential pair. It is managed by i.MX8
CSI0_D0 differential pair.
MIPI_/ MIPI_CSI0_D1-: CSI0 second input differential pair. It is managed by i.MX8
CSI0_D1 differential pair.
MIPI_/ MIPI_CSI0_D2-: CSI0 third input differential pair. It is managed by i.MX8 CSI0_D2 differential pair.
MIPI_CSI0_RST: CSI0 External camera module reset signal output. Managed by i.MX8 MIPI_CSI0_GPIO0 pin.
CSI Camera Connector CN3
Pin Signal
Pin
Signal
1
+3.3V_RUN
19
MIPI_CSI0_I2C0_SDA
2
+3.3V_RUN
20
MIPI_CSI0_EN
3
MIPI_
21
MIPI_CSI0_MCLK_OUT
4
MIPI_CSI0_D0-
22
MIPI_CSI1_EN
5
GND
23
HDMI_CSI1_I2C0_SCL
6
MIPI_
24
HDMI_CSI1_I2C0_SDA
7
MIPI_CSI0_D1-
25
GND
8
GND
26
HDMI_CSI
9
MIPI_
27
HDMI_CSI1_LANE2-
10
MIPI_CSI0_D2-
28
GND
11
MIPI_CSI0_RST
29
HDMI_CSI
12
HDMI_CSI
30
HDMI_CSI1_LANE0-
13
HDMI_CSI1_LANE3-
31
MIPI_CSI1_RST
14
GND
32
HDMI_CSI
15
MIPI_CSI0_
33
HDMI_CSI1_LANE1-
16
MIPI_CSI0_CSI_CLK-
34
GND
17
GND
35
CAM0_GPIO1
18
MIPI_CSI0_I2C0_SCL
36
CAM1_GPIO1 /
MIPI_CSI1_MCLK_OUT
