Q7-C26
Qseven
®
Rel. 2.1 Compliant Module
with NXP i.MX 8 Applications Processors
Page 1: ...Q7 C26 Qseven Rel 2 1 Compliant Module with NXP i MX 8 Applications Processors...
Page 2: ...ithout prior consent of SECO S p A is prohibited Every effort has been made to ensure the accuracy of this manual However SECO S p A accepts no responsibility for any inaccuracies errors or omissions...
Page 3: ...VIEW 12 2 1 Introduction 13 2 2 Technical Specifications 14 2 3 Electrical Specifications 15 2 3 1 Power Consumption 15 2 3 2 Power Rails meanings 16 2 4 Mechanical Specifications 17 2 5 Block Diagram...
Page 4: ...I DP interface signals 34 3 2 13 SPI interface signals 38 3 2 14 GPIO interface signals 38 3 2 15 CAN interface signals 38 3 2 16 SATA interface signals 38 3 2 17 SD interface signals 39 3 2 18 Power...
Page 5: ...ition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2020 SECO S p A 5 Warranty Information and assistance RMA number request Safety Electrostatic Discharges RoHS compliance Terminology and...
Page 6: ...ne The RMA authorisation number must be put both on the packaging and on the documents shipped with the items which must include all the accessories in their original packaging with no signs of damage...
Page 7: ...nter it is possible to send the faulty product to the SECO Repair Centre In this case follow this procedure o Returned items must be accompanied by a RMA Number Items sent without the RMA number will...
Page 8: ...ng RoHS compliant components and is manufactured on a lead free production line It is therefore fully RoHS compliant Always switch the power off and unplug the power supply unit before handling the bo...
Page 9: ...lay interface developed especially for internal connections between boards and digital displays FFC FPC Flexible Flat Cable Flat Panel Cable GBE Gigabit Ethernet Gbps Gigabits per second GND Ground GP...
Page 10: ...l MAC and the Physical Layer PHY SATA Serial Advance Technology Attachment a differential half duplex serial interface for Hard Disks SD Secure Digital a memory card type SDIO Secure Digital Input Out...
Page 11: ...ds shtml and http www ti com lit ml snla187 snla187 pdf MIPI http www mipi org MMC eMMC http www jedec org committees jc 649 NXP i MX8 processor https www nxp com products processors and microcontroll...
Page 12: ...6 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2020 SECO S p A 12 Introduction Technical Specifications Electrical Specifications Mechanical Specifications B...
Page 13: ...d security connectivity multimedia and real time response The module offers a very high level of integration both for all most common used peripherals in the ARM domain and for bus interfaces typicall...
Page 14: ...0x1080 60Hz Mass Storage 1x SATA Gen3 interface eMMC 5 1 drive soldered on board up to 64GB SD 4 bit interface 4MB QSPI Flash soldered on board PCI Express 2 x PCI e x1 Gen3 ports Networking 1 x Gigab...
Page 15: ...on Q7 C26 module like all Qseven modules needs a carrier board for its normal working All connections with the external world come through this carrier board which provide also the required voltage to...
Page 16: ...following meaning VCC Power Supply 5VDC 5 VCC_5V_SB Standby Power Supply 5VDC 5 VCC_RTC 3V backup cell input VCC_RTC is connected to a 3V backup cell for RTC operation and storage register non volati...
Page 17: ...rious connector heights for different carrier board applications needs Qseven specification suggests two connector heights 7 8mm and 7 5mm but it is also possible to use different connector heights al...
Page 18: ...ication processor LPDDR4 Memory Power section 1x SATA 1x USB 2 0 OTG Boot Select Signals Watchdog Power Mgmt 5V_RUN 5V_ALW Embedded Controller 4x USB 2 0 USB HSIC Hub 1 x Gigabit Ethernet Transceiver...
Page 19: ...Q7 C26 Q7 C26 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2020 SECO S p A 19 Introduction Connectors description...
Page 20: ...faces to the board are available through a single card edge connector Moreover an additional CSI Camera connector a JTAG connector a FAN connector and micro SD slot have been placed TOP SIDE Card edge...
Page 21: ...one MIPI CSI and one HDMI input interfaces are configured the MIPI CISI has 3 data lanes It is possible to access to the video input port through an FFC FPC connector type HIROSE p n FH12A 36S 0 5SH...
Page 22: ...d by i MX8 HDMI_RX0_DDC_SCL pin electrical level 5V_RUN with a up resistor HDMI_CSI1_I2C0_SDA CSI1 I2C Data Control Signal in MIPI CSI mode Managed by i MX8 MIPI_CSI1_I2C0_SDA pin up resistor When con...
Page 23: ...the fan to the NXP i MX8 processors 3 2 3 JTAG connector NXP i MX8 processors have a system JTAG Controller SJC and support two JTAG modes debug mode and test mode This interface is accessible through...
Page 24: ...raphs NOTE Even pins are available on top side of CPU board odd pins are available on bottom side of CPU board Please refer to board photos Qseven Golden Finger Connector CN1 BOTTOM SIDE TOP SIDE SIGN...
Page 25: ...UDIO O I2S_WS 59 60 SMB_CLK I O MISC AUDIO O I2S_RST 61 62 SMB_DAT I O MISC AUDIO O I2S_CLK 63 64 SMB_ALERT I O MISC AUDIO I I2S_SDI 65 66 GP0_I2C_CLK I O MISC AUDIO O I2S_SDO 67 68 GP0_I2C_DAT I O MI...
Page 26: ...120 LVDS_B_CLK O LVDS LVDS eDP O LVDS_A_CLK eDP0_AUX 121 122 LVDS_B_CLK O LVDS LVDS eDP O LVDS_BLT_CTRL 123 124 HDMI_CEC I O HDMI LVDS I O LVDS_DID_DAT 125 126 eDP0_HPD LVDS_BLC_DAT I O LVDS eDP LVDS...
Page 27: ...UART0_CTS I UART PCI E O PCIE0_TX 179 180 PCIE0_RX I PCI E PCI E O PCIE0_TX 181 182 PCIE0_RX I PCI E PWR GND 183 184 GND PWR GPIO I O GPIO0 185 186 GPIO1 I O GPIO GPIO I O GPIO2 187 188 GPIO3 I O GPI...
Page 28: ...ferential pair PCIE1_RX PCIE1_RX PCI Express lane 1 Receiving Input Differential pair PCIE1_TX PCIE1_TX PCI Express lane 1 Transmitting Output Differential pair PCIE_CLK_REF PCIE_CLK_REF PCI Express R...
Page 29: ...transceiver for the Carrier board All schematics henceforth also referred to as material contained in this manual are provided by SECO S r l for the sole purpose of supporting the customers internal...
Page 30: ...ntroller link indicator Active Low Output signal electrical level 3 3V_RUN with10k pull up resistor GBE_LINK100 Ethernet controller 100Mbps link indicator Active Low Output signal electrical level 3 3...
Page 31: ...3 0 controller USB_0_1_OC USB Over Current Detect Input Active Low Input signal electrical level 3 3V_RUN with 10k pull up resistor This pin is used to monitor the USB power over current of the USB Po...
Page 32: ...viewed by S R Copyright 2020 SECO S p A 32 For EMI ESD protection common mode chokes on USB data lines and clamping diodes on USB data and voltage lines are also needed The schematics below show an ex...
Page 33: ...e carrier board 3 2 11 LVDS eDP Flat Panel signals All processors included in i MX8 family include an LVDS Display Bridge LDB for connecting to an External LVDS Display Interface The purpose of the LD...
Page 34: ...nnected LVDS display LVDS_BLT_CTRL this signal can be used to adjust the panel backlight brightness in displays supporting Pulse Width Modulated PWM regulations LVDS_DID_DAT DisplayID DDC Data line fo...
Page 35: ...Carrier board It is still necessary however to implement voltage level shifters on Control data Clock signals as well as for Hot Plug Detect signal When the module is configured to have embedded Disp...
Page 36: ...E1 Display Port differential pair 1 DP_LANE0 DP_LANE0 Display Port differential pair 0 DP_AUX DP_AUX Display Port auxiliary channel differential pair DP_HPD DisplayPort Hot Plug Detect Input signal 3...
Page 37: ...B 6 OE2 4 VCC 14 PAD 15 OE3 10 3A 9 3B 8 4A 12 OE4 13 4B 11 R6 R 100K C2 CC 100nF C3 CC 100nF R4 R 100K 3 3V_S 3 3V_S CAD R11 R 0 X R9 R 0 X DP_HPD R12 R 0 X CAD CAD DP_AUX DP_AUX HDMI_CTRL_CLK HDMI_C...
Page 38: ...put electrical level 3 3V_RUN 3 2 15 CAN interface signals The NXP i MX8 processors include a Flexible Controller Area Network FLEXCAN module which is a communication controller implementing the CAN p...
Page 39: ...pecifications on the golden edge finger connector there is a set of signals that are used to manage the power rails and power states The signals involved are PWGIN Power Good Input 5V_RUN tolerant act...
Page 40: ...ctional signal active low electrical level 3 3V_RUN Any device place on the SM Bus can drive this signal low to signal an event on the bus itself GP0_I2C_CLK general purpose I2C Bus clock line Bidirec...
Page 41: ...gnals According to Qseven Standard specifications rel 2 1 on pin designed as MFG_NCx 207 210 are carried from NXP i MX8 processors Debug UART signals for firmware and boot loader implementations and f...
Page 42: ...Q7 C26 Q7 C26 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2020 SECO S p A 42 Thermal Design...
Page 43: ...er like heatsinks fans heat pipes and so on Conversely heatsinks in some situation can represent the cooling solution Indeed when using Q7 C26 module it is necessary to consider carefully the heat gen...
Page 44: ...7 C26 User Manual Rev First Edition 1 0 Last Edition 1 0 Author A R Reviewed by S R Copyright 2020 SECO S p A 44 SECO S p A Via A Grandi 20 52100 Arezzo ITALY Ph 39 0575 26979 Fax 39 0575 350210 www s...
