Seagate ST213 User Manual Download Page 1 | Manualshive

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Summary of Contents for ST213

Page 1: ...OEM MANUAL II PLEASE NOTE SPECIFICATIONS OF THE ST213 HALF HEIGHT 10MB DRIVE CAN BE FOUND AT THE BACK OF THIS MANUAL I c o _ H_W _ _ _ _ _ _ i l7 t t _ _ c i _ _L i _ t y 95066 4544 USA 408 438 6550 II I Seayate I I ...

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Page 3: ...ncy I JJmsec noml 1 EnOR RATES RKowf bI ReIHl Enon Non rtICowr W RlrIHf Enon Seek Erron 1itK wHhlll ret u No4I NCCftIftlbie hlll REWlnsrY S WnCATIONS MTBf 20 000 A7wer Houn PM Not Requhod M1TR 30Mlnul SeI Ylce U S lean OP RATIONAL ENVIRONMENT AmbMtnI1empefllturo ttrC 10 45 C ISD Flo 113 F Temperalure C ch nt 1O Cthr 1S r 1 Rel liw HumidUy 1080 nonconden lnl Maximum Wet Bulb 28 1 1 1nonconden lnf D...

Page 4: ... 3 11I O 0 Iaaa C n t J g 1 I o CI C Q n C ell 0 tii g CJ N Uil UII Q S8 I eN Q oOD W Q fJ C W I m I fA ...

Page 5: ...Select 20 4 6 Recovery Mode 21 5 0 CONTROL OUTPUT SiGNALS 22 5 1 Drive Selected 22 5 2 Index 22 5 3 Track 22 5 4 index and Track Scnsinl 22 5 5 Ready 23 5 6 Seck Complete 23 5 7 Writc f uli 23 S 7 1 Wriie fault Signll lener iion 23 5 7 1 1 Wrile Curreni imerrupiioli 23 TABLE OF CONTENTS o o 3 tI tI tI MTA f1ELD A nu ric21 1 in Hex dtfinin lhe hoad lcc1ed floW Dnnl A field or 1I etOS 10sync lhe VfO...

Page 6: ...I Preamp 28 7 204low PatsS Filler 28 7 2 5 Phase Shifr r 28 7 2 6 Z ro ClosS DCICclOr 29 7 2 7 Time I omain Fih r 29 1 2 8 Line Du h er 29 1 0 TlIt ORY OF OPERATIO l S 30 8 1 Microproc sor 30 8 1 1 MPU h ilializing 30 8 1 2 MPU Itdle 30 8 3 Seeking 31 8 2 Spindle M01er Conllel 31 9 0 fIELD SERVICE 3J 9 1 PC Board Removal JJ 10 0COMPOSf T LOCATIO S SCm MATICS J5 APPE IODIXI J2Srclnr 256 D le Se lor...

Page 7: ...guration 13 FIGURE II Radial Configuralion _ 14 FIGURE 12 Comrol Signals Drh er ReceiverCombinalion 16 FIGURE 13 Read Wrile Timing 17 FIGURE 14 Buffered Seek Timing _ 18 FIGURE IS Slow Step Timing _ 18 FIGURE 16 AUla Truncation Timing 19 FIGURE 17 Drive Select 20 FIGURE 18 Recovery Mode Timing 21 FIGURE 19 Faull Detection Flow 24 FIGURE 20 Power On Sequence Timing _ 2S FIGURE 21 Dala Signal Driver...

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Page 9: ...ystem integratoi with over 20 megabytes of formalled capacity in a hock esisiani half heighi package The ST225 is designed fOr single user desk lOp systems local storage in network or multi user sysiems Or lIS an add in upgrade for PCs The low power ST22S design is ideal for th lip plical ions in either rugged indumial or quiet office environments The ST225 supports the industry siandard ST412 int...

Page 10: ...d may be eAchanicd in Ihe field Refer below 10 Sccl m 9 1 for hi procedure PC BOARD REMOVAL 9 1 FIGURE 26 PC Board Removal UOUNTING SCREWS 0 COUPONENT SIDE h or o ISOOA Ii SlUEt PCC_ UOUNT ON SOlDER SlDEI CONNECTION ST11 OEM kt T SPlNOlE UQTOR CONNECTION STEPPER MOTOR CONNECTION 3J ...

Page 11: ...he Hall transistions to commutate the motor phases It regulates the motor speed by measuring the Hall period and comparing it to the oscilla tor clock period 1 Employs a sense line to regulate the start current and execute a cur rent limit shut orr 3 Monitors the power supply for output driver shut olf When the power is olf the oulput drivers become self biases on which brakes the molor using back...

Page 12: ...red and employs the optimum step algorithm to mlch Ihe largetlrack While seeking Ihe MPU conlrols the direction and mode of the cus tom stepper Ie Pulses are sent to the stepper chip which does the ac tual phase commulations Acttleralion deceleration are delermined by the varied frequency of the pulses and he use of the MOlor IC Direc tion line This IC provides both Ii curreni source and sink iO m...

Page 13: ...e or degmdation in perronnancc I IFnquenc Vlbratloll 5 22 Hz 010 double amplitude 22 300 Hz 50 G amplitude peak 300 22 Hz 50 G amplitude peak 22 5 Hz 010 double amplitude At power on the MPU initializes the stepper circuit to phase minus A and minus B and resets all interrace lines under its control As the drive spins up the MPU switches rrom bipolar to unipolar aRer approximately 40 revolutions T...

Page 14: ...he zero threshold At this point analog data an cbanged to di gig 1 2 ti 7 2 1 7 2 ZERO CROSS DETECTOR TIME DOMAIN FILTER LINE DRIVER When a high resolution head reads a low frequency data pallem there is I tendency for the head signal to decay between bilS If the signal de cays below the uro cross threshold a spurious data bit will be generat ed Such false bits are ignored by delaying the clocking...

Page 15: ...eT for Read or Write mode The ST22S may be mounted in the following orientations Horizontal Spindle motor dowo Sides Left or riaht The drive should not be tilted front 10 back in any position by more thail 5 Refa to Figures 2 and J for reference and mounung di mensions for optimum performance the drive should be formatted in the Slime orientation liSit will be mounted in the bost system 1 7 1 7 1 ...

Page 16: ...ltranspon The Read Write heads may be parked in the shipping zone by issuing a seek to any cylinder between 615 670 The drive may then be powered down Upon power up the drive will recalibrate to Track _ Ir the heads are parked while power is still applied any Step pulse will cause the unit to recaJibrate to Track MFM WRITE DATA WRITE GATE LINE RECEIVER 1 1 1 1 1 2 7 1 3 1 100 1 i J m 21 _ r UN t O...

Page 17: ...ive by the frame 001 Control and status signals belween the host and the drive are lransmined through a 34 pin PCB edg onneclor J I Figurt Iindi cales connector dimensions and Table I list Ihe pin assignments A hosl drive interconnection is illustrated in Figure 5 With the drive resting on a padded surface orienled wilh the PC Board up and Ihe edge coonectors toward you J I is 10 your lefland J2 i...

Page 18: ...TED 1660 od 1 TRACK I t I 1 1 f 4 t l I 11 _ SEEK COMPLETE J 2 1 I I I 2 __ I The application of DC power inititates a sequence ihai star1Sihe llpin die motor regulates its speed Ieps the Read Write heads 10 Tm k _ and i55UesREADY IInd SEEK COMPLETE lCQuentiallyiO terminate the sequence READY and SEEK COMPLETE are i55Ued10 the interface when ibe drive il available 10 accept tommands Upon power up ...

Page 19: ...tion is iUustrated in Figure 7 With the driw resting on I padded surface oriented with the PC Board up and the edge conilectors toward you J2 is to your right arid J I is on the left Refer below to Figure 9 J2 pins are numbered I through 20 with the even pins located on the solder side of the PCB A key slot is provided between pins 4 Ilnd 6 Pin 2 is labeled The recommeilded mating COil nectar for ...

Page 20: ...OI be altempled when SEEK COMPLETE s false SEEK COMPLETE will go raise in the rollowinl cascs I When a recalibralion sequence is inilialed by drive 101ic al power on 2 IOOnsectypical after Ihe leading edge or a Slep pulse 3 Ir eilher S Volls or 12 Volts are detected as unsafe 4 At the beginning and end of a RECOVERY MODE operalion WRITE FAULT SIGNAL GENERATION 5 7 1 With DRIVE SELECT active and an...

Page 21: ...n from high to low or the leading edge is valid 5 3 TRACK _ FIGURE 8 J3 Connector rr0000il This signal is active true ooly wheo the Read Write beads are posi tioned at Cylinder Zero Track is the ooly cylinder that provides interrace recognition The drive is designed to recalibrate to Track during power on aod Auto Truncation operations Track _ may also be accessed via cooventional Buffered Seek an...

Page 22: ...tion 4 1 f 1 J I I _ SUI COMPI ETi II I_ i RECOVERY MODE 1 SfV RECOVERY MODE FIGURE 18 Recovery Mode Timing i FIGURE 9 Host Drive Interface and Drive Configuration RESISTOR TERMINA nON PACK J2 2D PIN CONNECTOR OPTIONAoI GROUNDING POINT PIe no the pcM 0111Io OIIed ong aShefI I J7 16 PIN CONNECTOR Dove conligural Shown WI h drIv con igured as OS I 00000008 ITlll r un fES 4 i2 21 ...

Page 23: ...chain must havc II 22013JOQ resistor termination pack installed on the PCB Refer 10 Figur 9 abovc for resistor pack locz lion The DRIVE SELECT line enables the controller 10 select and address the drive Control cablc interfacc options use either a Dais Chain or Radial configuation Pins 15 16 shoned enables DRIVE SELECT I Pins 13 14 shoned enables DRIVE SELECT 2 Pins i1 12 shorted enables DRIVE SEL...

Page 24: ...p the remaining cylinders witb DIRECTION IN true FIGURE 16 Auto Truneation Timing FIGURE 11 Radial Configuration RADIAL DIIIVI 1 DIIIVI 2 DIIIVI S DIIIVI 4 TER TOR PACK r JI TEll TOR PACK r J2 CONTROI I STATUS SECTION DATA HANOUNCJ SECTIOHI 3 3 DIRECTION IN 4 4 The WRITE FAULT signal may be inlemailylatched This latch may be cleared wben DRIVE SELECT gocs false if pins 5 and 6 are shon ed at J7 Th...

Page 25: ...ERY MODE line false ai the interface The drive then returns the heads to the nominal position by taking SEEK COMPLETE false waiting 8mscc for the heads to settle and reassert ing SEEK COMPLETE Note AU writing is inhibited while the RECOVERY MODE signal is irUc To minimize access time pubes may be issued at an accelerated rate and buffered in a counter Initiation of a seek starts immediately after ...

Page 26: ...nimum width pulse that intitiates Read Write head motion The number of pulses issued detennines distance traveled Pulses are edge detec tedon the leadins edge of the pulse The rate of Step pulses determines the access method If the period between pulses is from 5 isec to 2 the access method will be Buffcred Seek Slow Step is employed if the period between pulses is greater than or equal to Jmsec D...

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