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Seagate Medalist ST31082A, Product Manual

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Seagate Medalist ST31082A Product Manual Download Page 44

Chapter 6

Register Addresses and Functions

Page 32

ST3636A/ST31082A/ST31276A

Addr*

-CSO

-CS1

HA2

HA1

HA0

Read Function

Write Function

1

1

x

x

x

No Operation

No Operation

0

0

x

x

x

Invalid Address

Invalid Address

1

0

0

x

x

High Impedance

Not Used

1

0

1

0

x

High Impedance

Not Used

1F0

0

1

0

0

0

Data Register

Data Register

1F1

0

1

0

0

1

Error Register

Features Register

1F2

0

1

0

1

0

Sector Count

Sector Count

1F3

0

1

0

1

1

Sector Number

Sector Number

1F4

0

1

1

0

0

Cylinder Low

Cylinder Low

1F5

0

1

1

0

1

Cylinder High

Cylinder High

1F6

0

1

1

1

0

Device/Head Register

Device/Head Register

1F7

0

1

1

1

1

Status Register

Command Register

3F6

1

0

1

1

0

Alternate Status Register

Device Control Register

3F7

1

0

1

1

1

Device Address Register

Not Used

x = don't care

* These I/O port addresses are listed for programmer reference. They are a function

of I/O decoding in the Host Adapter. These addresses are required for compatibility
with most AT BIOS.

Summary of Contents for Medalist ST31082A

Page 1: ...Medalist Family ST31276A ST31082A ST3636A Product Manual...

Page 2: ......

Page 3: ...ST3636A ST31082A ST31276A Intelligent Disk Drive Product Manual P N 20401028 001 Revision C September 1996 920 Disc Drive Scotts Valley California 95066...

Page 4: ......

Page 5: ...and receiver are on different branch circuits If necessary you should consult the dealer or an experienced radio television technician for additional suggestions You may find the following booklet pr...

Page 6: ...is conveyed to reproduce or translate any item herein disclosed without express written permission from Seagate Technology Inc Seagate Technology Inc provides this manual as is without warranty of an...

Page 7: ......

Page 8: ......

Page 9: ...5 Drive Capacity 6 Physical Configuration 6 Performance Characteristics 7 Read Write Characteristics 8 Reliability 8 Power Requirements 9 Environmental Tolerances 9 Product Test Standards 10 Physical...

Page 10: ...es Register formerly Write Precomp Register 36 Sector Count 36 Sector Number 36 Cylinder Low 37 Cylinder High 37 Device Head Register 38 Status Register 39 Alternate Status Register 40 Device Control...

Page 11: ...nical Reference Manual Page iii Write DMA 71 Write Caching 71 Write Multiple 72 Write Caching 72 Write Sector s 74 Write Caching 75 Write Sector Buffer 75 8 Error Reporting 77 Error and Status Detecti...

Page 12: ...Table of Contents ST3636A ST1082A ST31276A Page iv ST3636A ST31082A ST31276A...

Page 13: ...in this manual as the drive Features of the Drive The drive provides these features can be installed in a wide range of host systems high performance rotary voice coil actuator with embedded servo one...

Page 14: ...ontaminants which might degrade head and media reliability Aluminum tape seals the joint between the base and cover Critical drive components are contained within this contaminant free environment whi...

Page 15: ...File Interface Read Write Heads and Disks Data is recorded on a 95mm diameter disk using thin film tri pad or close proximity head The ST3636A contains one disk with two data surfaces two read write h...

Page 16: ...ated circuit IC is mounted within the head disk assembly in close proximity to the read write heads The IC provides head selection read pre amplification and write drive circuitry Circuit Board The dr...

Page 17: ...This Chapter This chapter defines the following specifications for the drive drive capacity physical configuration performance characteristics read write characteristics reliability power requirement...

Page 18: ...Voice Coil Rotary Voice Coil Rotary Voice Coil Number of Disks 1 2 2 Data Surfaces 2 4 4 Data Heads 2 4 4 Servo Embedded Embedded Embedded Tracks per Surface 4893 4893 4893 Buffer Size 64KB 64KB 64KB...

Page 19: ...Q after the host writes the command register with a READ instruction for the case where the data already resides in the buffer The average seek time is determined by averaging the seek time for a mini...

Page 20: ...reversals per inch Data Transfer Rate To From Media 33 6 megabits second 67 2 megabits second To From Host PIO Mode 4 16 7 MB second or Multiword DMA Mode 2 Reliability Data Reliability 1 non recovera...

Page 21: ...power is when the supply voltage is at the worst case condition Minimum Maximum Voltage 5V 5 12V 5 Maximum Peak to Peak Noise Allowed DC to 1 MHz with equivalent resistive load 5V 2 12V 1 Environmenta...

Page 22: ...4 dBA in Idle Mode at a distance of 1 meter from the drive The sound power level measured based on ISO 7779 will not exceed 4 0 Bel in Idle Mode Product Test Standards The drive is designed to comply...

Page 23: ...imensions 1 00 03 25 4 762 3 716 03 94 386 762 4 00 03 101 6 762 3 750 01 95 25 254 5 75 03 146 05 762 4 000 101 6 254 3x 250 015 6 35 381 BOTH SIDES 2 227 03 56 565 762 0 18 015 4 572 381 0 23 015 5...

Page 24: ...Chapter 2 Specifications Page 12 ST3636A ST31082A ST31276A...

Page 25: ...on the last accessed track Standby Mode occurs when the motor is stopped and the actuator is parked Standby Mode occurs after a programmable time out since the last host access occurs The drive will...

Page 26: ...d on the host interface one must be designated as the master drive drive 0 and one as the slave drive drive 1 Commands from the host are written in parallel to both drives When the D0 jumper on the dr...

Page 27: ...CSEL of the drive intended to be drive C 0 This drive will then function as the Master If CSEL is allowed to float the drive will recognize itself as drive D 1 and function as the Slave Forced M S op...

Page 28: ...Chapter 3 How the Drive Operates Page 16 ST3636A ST31082A ST31276A...

Page 29: ...rk in an uncarpeted area 2 Before removing the equipment from its anti static bag discharge static electricity by touching your computer s metal chassis or any other grounded object while touching the...

Page 30: ...ter Standalone Slave Jumper 1 3 5 2 4 6 D1 D0 1 3 5 2 4 6 D1 D0 1 3 5 2 4 6 D1 D0 Cable Select Forced Slave Present 1 3 5 2 4 6 D1 D0 Jumper Jumper Here is how you can set these jumpers Pins described...

Page 31: ...4 2 Refer to the table on the following page for pin out information Figure 4 2 Attaching a Data Cable 40 Pin Task File Interface Data Connection Pin 1 typically indicated by a colored stripe on the d...

Page 32: ...14 HOST DATA 13 15 HOST DATA 1 16 HOST DATA 14 17 HOST DATA 0 18 HOST DATA 15 19 GND 20 KEY 21 DMARQ 22 GND 23 HOST IOW 24 GND 25 HOST IOR 26 GND 27 IOCHRDY 28 CSEL 29 DMACK 30 GND 31 HOST IRQ14 32 H...

Page 33: ...Pin 1 Caution Do not route the power cable next to the drive PCB or any other high frequency or large current switching signals Improper drive operation can result from improper cable routing The fol...

Page 34: ...on which you mount the drive should be flat and parallel to prevent uneven pressure on the drive Mounting the drive on an uneven surface could cause the drive s base to deform degrading drive performa...

Page 35: ...ns of signals are listed beginning on the next page under Signal Descriptions Signal Conventions The following conventions are used in the discussions that follow All signals on the host interface sha...

Page 36: ...ask file register or the data register on the drive HOST IOR O 25 Read strobe which when low enables data from the Task File on the drive onto the host data bus HD0 HD15 The rising edge of HOST IOR la...

Page 37: ...cute Drive Diagnostics command the slave will negate PDIAG within 1 ms to indicate to the master that it is busy and has not yet passed its drive diagnostics If the slave is present then the master wi...

Page 38: ...n 400 ms to indicate that the slave is present The master shall allow up to 450 ms for the slave to assert DASP If the slave is not present the master may assert DASP to drive an activity LED DASP sha...

Page 39: ...N A 1ms Notes 1 DASP is asserted by both the master and the slave The signal on the bus is the wired OR of DASP from both drives The master de asserts DASP within 1ms after reset and waits for up to...

Page 40: ...ata active after IOR active 30 ns T7 Read Data active after IOR inactive 5 ns T8 Write Data active until IOW inactive 20 ns T9 Write Data active after IOW inactive 10 ns T10 IOR or IOW active until IO...

Page 41: ...to IOR IOW low 10 ns T4 IOR IOW pulse width 60 ns T5 IOR IOW cycle time 120 ns T6 IOR low to HDB 15 0 active 30 ns T7 IOR high to HDB 15 0 inactive 5 ns T9 HDB 15 0 set up to IOW high 20 ns T10 HDB 15...

Page 42: ...Chapter 5 Host Interface Page 30 ST3636A ST31082A ST31276A...

Page 43: ...erface The high order chip select HOST CS1 is used to access register 3F6 or 3F7 The low order chip select HOST CS0 is used to address registers 1F0 through 1F7 ECC bytes are transferred on bits 7 0 T...

Page 44: ...0 1 0 1 0 Sector Count Sector Count 1F3 0 1 0 1 1 Sector Number Sector Number 1F4 0 1 1 0 0 Cylinder Low Cylinder Low 1F5 0 1 1 0 1 Cylinder High Cylinder High 1F6 0 1 1 1 0 Device Head Register Devi...

Page 45: ...to map the DOS accessible address space to the IDE register accessible address space Some non DOS operating systems utilize additional bits in the Cylinder High register to go beyond the DOS limit Log...

Page 46: ...rite Description This is the register through which all data is passed on Read and Write commands to which the sector table is transferred during Format commands to which data associated with the Iden...

Page 47: ...iagnostic command The bits in the register are defined below Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 BBK UNC not used IDNF not used ABRT TK0 not used where BBK indicates that a bad block mark...

Page 48: ...sector is read such that the register contains the number of sectors left to access in the event of an error in a multi sector operation The contents of this register define the number of sectors per...

Page 49: ...the end of the command this register is updated to reflect the current cylinder number Cylinder High Port Address 1F5 Chip Select HOST CS0 Register Address 5 Function Read Write CHS Description This...

Page 50: ...is set the slave drive is selected While both drive s Task File registers are always written this bit selects which drive will respond and execute a command LBA is the binary coded address mode select...

Page 51: ...any the following circumstances At activation of the Host Reset pin in the interface or at activation of the software reset bit in the digital output register Immediately upon host write of the comma...

Page 52: ...the host and the Data register CORR is the corrected data bit which is not used in this drive IDX is the index bit which is set once per disk revolution This function is not updated by this drive ERR...

Page 53: ...not used not used SRST IEN not used where SRST is the host software reset bit The drive is held reset when this bit is active and enabled when this bit is inactive IEN is the enable bit for this disk...

Page 54: ...of the binary coded address of the currently selected head For example if HS3 through HS0 are 1 1 0 0 respectively head 3 is selected DS1 is the drive select bit for drive 1 and should be active when...

Page 55: ...s 1 1 1 0 1 1 1 1 n n n d y Set Multiple Mode 1 1 0 0 0 1 1 0 y n n d n S M A R T 1 0 1 1 0 0 0 0 n n y d y Write DMA 1 1 0 0 1 0 1 r y y y y n Write Multiple 1 1 0 0 0 1 0 1 y y y y n Write Sectors 0...

Page 56: ...e 44 ST3636A ST31082A ST31276A d means only the drive parameter is valid and not the head parameter p is a valid bit for power commands E0 E3 and E5 E6 e means the registers contain valid parameters w...

Page 57: ...us to the host at command completion To issue a command the host must load the pertinent registers in the Task File activate the interrupt enable bit IEN in the Device Control register write the comma...

Page 58: ...d by the standard command set The Sector Number register must be set to 9A hex and the specific command in the Sector Count register The Cylinder High and Low registers are used to pass any bytes used...

Page 59: ...ns it in the Cylinder High and Cylinder Low registers The bit meaning is as follows Bit Description 15 Reserved 14 Reserved 13 Reserved 12 Reserved 11 Reserved 10 Reserved 9 Reserved 8 Reserved 7 Rese...

Page 60: ...the Error register should be viewed as a unique 8 bit code and not as the single bit flags defined previously The interface registers are set to initial values except for the Error register The table...

Page 61: ...hex Description 0 General configuration bit significant information 0C5A 1 Default number of logical cylinders 2 Reserved 3 Default number of logical heads 4 Vendor specific Obsolete 5 Vendor specifi...

Page 62: ...ved bit 1 1 the fields reported in words 64 70 are valid 0 the fields reported in words 64 70 are not valid bit 0 1 the fields reported in words 54 58 are valid 0 the fields reported in words 54 58 ar...

Page 63: ...ycle time per word ns 66 Recommended multiword DMA transfer cycle time ns 67 Minimum PIO transfer cycle time without flow control ns 68 Minimum PIO transfer cycle time with IORDY flow control ns 69 79...

Page 64: ...0 1 support SMART feature set 83 Command sets supported If word 82 and 83 0000H or FFFFH command set notification not supported bit 15 0 must be cleared to 0 bit 14 1 must be set to 1 bit 13 0 0 reser...

Page 65: ...he sector and head values in the Task File are not checked for validity by this command If they are invalid no error will be reported until an illegal access is made by some other command Cylinder hea...

Page 66: ...unt register is non zero then the Auto Power Down feature is enabled and will take effect when the drive returns to Idle Mode If the Sector Count register is zero then the Auto Power Down feature is d...

Page 67: ...xF1 hex through 0xFF hex The minimum time out value is 60 seconds which means the smallest value for the Sector Count register is 12 0x0C hex when enabling the Auto Power down feature If a number betw...

Page 68: ...r to the Read Multiple command When the Read Multiple command is issued the Sector Count register will contain the number of sectors not the number of blocks or the block count requested If this secto...

Page 69: ...Found Error IDNF is set If the drive is not already on the desired track an implied Seek is performed Once at the desired track the drive begins searching for the appropriate ID field If the ID is re...

Page 70: ...are 8 bit transfers Read Sector Buffer Command Number E4 hex Description The Read Buffer command allows the host to read the current contents of the drive s sector buffer Only the Command register is...

Page 71: ...response will be given in the Error register Upon successful completion of the command the Task File registers will be as follows Register Value Error 00 Sector Count Unchanged Sector Number Unchange...

Page 72: ...etermined by the value of the Feature Word which is factory set The drive will retain the settings through both soft and hard resets The Set Transfer Mode command set the current transfer mode accordi...

Page 73: ...ter contents If the register contents are valid and a supported block count is supplied that value is loaded for all subsequent Read Multiple and Write Multiple commands and execution of these command...

Page 74: ...is ignored by the drive The key values are shown below Key Value Register 4FH Cylinder Low 1F4H C2H Cylinder High 1F5H In order to select a subcommand the host must write the subcommand code to the d...

Page 75: ...disables the AutoSave feature depending upon Sector Count clears BSY and activates IRQ During execution of its AutoSave routine the device does not set BSY nor clear DRDY If the device receives a com...

Page 76: ...specified at the end of this command description Any Attribute Values accumulated and saved to non volatile memory prior to receipt of the Disable Smart Operations command will be preserved in the dri...

Page 77: ...numbered byte address location in the field Table 7 1 Device Attributes Data Structure Description Bytes Format Type Data Structure Revision Number 0005H 2 binary Rd only 1st Device Attribute 12 see...

Page 78: ...d values from 01H to FEH 1 binary Rd only 00H invalid for Attribute value not to be used 01H minimum value 64H initial value for all attributes prior to any data FDH maximum value FEH value is not val...

Page 79: ...0010 Vendor Specific 5 0020 Vendor Specific 6 F 0040 8000 Reserved Attribute Values The range and meaning of the Attribute Values is defined in Table 7 2 Prior to the monitoring and saving of Attribut...

Page 80: ...the ATA 2 specification for byte ordering namely that the least significant byte occupies the lowest numbered byte address location in the field The sequence of active Attribute Thresholds must appea...

Page 81: ...nary Rd only 00 hex always passing threshold value to be used for code test purposes 01 hex minimum value for normal operation 64 hex maximum value for normal operation FD hex maximum value FE hex inv...

Page 82: ...te Values or Attribute Threshold data structure The drive is unable to write to its Attribute Values data structure The meaning of the following bits in the Error register do not correspond the defini...

Page 83: ...d This command is then referred to as a cached write When a cached write command is received the data is taken from the host and ending status is posted before the data has been written to the disk If...

Page 84: ...rite Multiple command is attempted before the Set Multiple mode command has been executed or when Write Multiple commands are disabled the Write Multiple operation will be rejected with an Aborted Com...

Page 85: ...ccessfully gets written even if an error should occur If a sector cannot be written the drive will dynamically assign an alternate sector and continue writing the data If an error occurs during re all...

Page 86: ...is returned If the drive is not already on the desired track an implied Seek is performed Once at the desired track the drive begins searching for the appropriate ID field If the ID is correct the dat...

Page 87: ...ore taking data from the new write Read commands work similarly the previous write is allowed to finish before the read operation starts In addition to caching dynamic sparing of bad sectors has been...

Page 88: ...Chapter 7 Command Set Page 76 ST3636A ST31082A ST31276A...

Page 89: ...e error and status bits that are valid for each command are summarized below When BSY 1 all other bits in the Status register are not valid The bits in the Error register are valid only when ERR is se...

Page 90: ...ple ERR ABRT S M A R T DRDY DWF DSC ERR ABRT IDNF refer to S M A R T command on page 62 Write Buffer ERR ABRT Write Multiple DRDY DWF DSC ERR BBK IDNF ABRT Write Sector s DRDY DWF DSC ERR BBK IDNF ABR...

Page 91: ...ouping of tracks which can be accessed without moving the actuator Cylinder logical A mapping of sectors on the disk drive into an imaginary cylinder for purposes of achieving compatibility with legac...

Page 92: ...code values are set aside for future standardization Their use and interpretation may be specified by future extensions to this or other standards Sector A uniquely addressable set of 256 words 512 by...

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