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drive IORDY until –DMACK is deasserted and then tristates IORDY
within (Tiordyz) nanoseconds.
•
A device that supports a particular mode timing must support all slower
modes.
3.3.3
Error Register
Field/Bit Description
Bit
7
6
5
4
3
2
1
0
ICRCE UNC
MC
IDNF
MCR ABRT TKONF AMNF
•
ICRCE (Interface CRC Error) indicates that a CRC error occurred on
the data bus during a Synchronous DMA transfer. The correct re-
sponse for this error is to retry the complete command. ABRT (bit 2)
is also set to ensure compatibility with drivers designed for previous
versions of the Synchronous DMA Transfer Protocol Specification.
•
ABRT (Aborted Command) indicates the requested command was
aborted, because the command code or a command parameter is
invalid, or some other error occurred. The device may complete some
portion of the command prior to setting ABRT and terminating the
command. If the command was a data-transfer command, the data
transfer is determinate. This bit is also set when an Interface CRC
Error (bit 7) occurs. This ensures compatibility with drivers designed
for previous versions of the Synchronous DMA Protocol Specification.
Medalist Pro 9140, 6530 and 4520 Product Manual, Rev. B
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