6-2
Close and Reclose Logic
Date Code 990215
SEL-351P Manual Técnico
Figure SECTION 6: .1:
Close Logic
Set Close
If all the following are true:
•
The unlatch close condition is not asserted (ULCL = logical 0).
•
The circuit breaker is open (52A = logical 0).
•
The reclose initiation condition (79RI) is not making a rising edge (logical 0 to
logical 1) transition.
•
And a close failure condition does not exist (Relay Word bit CF = 0).
Then the CLOSE Relay Word bit can be asserted to logical 1 if either of the following occurs:
•
A reclosing relay open interval times out (qualified by SEL
OGIC
Control Equation
setting 79CLS – see Figure SECTION 6: .2).
•
Or SEL
OGIC
Control Equation setting CL goes from logical 0 to logical 1 (rising edge
transition).
The CLOSE Relay Word bit output of the close logic in Figure SECTION 6: .1 propagates to the
final trip/close logic in Figure 7.29 . The logic in Figure 7.29 controls dedicated trip and close
output contacts and prevents the trip and close output contacts from being asserted at the same
time.
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