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Programming 

Communicating with IndustryPacks installed on the Flex/104A involves writing and 
reading from four registers on the Flex/104A.  The IP Access Register, Upper Address 
Register, and Data Register are all used together to access registers on board the 
IndustryPacks.   

The first step in starting an access is to program the IP Access Register (formerly known 
as the Address Register in the Flex/104).  Programming this register determines which 
IndustryPack slot is accessed, what space on the IndustryPack (I/O, Memory, ID, or 
Interrupt space), and at what offset on the IP the access occurs.   

Next, if a Memory space access is to be made, the Upper Address Register must be 
programmed with the upper address bits of the IP bus.  IF any other space on the IP is 
accessed, this step can be skipped. 

Finally, accessing the Data Register initiates the IP access.  Reading the Data Register 
causes a read of the IP at the space and offset that is programmed into the IP Access 
Register.  Similarly, a write to the Data Register writes the data in the Data Register into 
the IP at the space and offset specified in the IP Access Register. 

While the access is in process, the IP Wait bit in the Control and Status Register is 
asserted high.  Once the access is complete, the bit returns to zero.  Before starting 
another access, the programmer must check this bit and verify that it is zero.  If the 
IndustryPack fails to acknowledge the access within 64 

µ

s, the Flex/104A terminates the 

access and asserts the TM STAT bit in the Control and Status Register.  To clear this bit, 
the programmer must write a one to TM RST bit in the Control and Status Register. 

The sections below explain each of these registers in more detail. 

Register Map 

The PC/104 programmer can access the IndustryPack modules on board the Flex/104A 
using the set of registers listed below.  These registers are located on the Flex/104A 
card, not the IndustryPacks.  Each register is at a unique offset address from the base 
address.  Base address for the Flex/104A is set using shunts E1 and E2.  For more 
information on the base address, refer to the Addressing section on page ? 

 

Offset Register 

Name 

Read/Write 

0x00 Data 

Register 

Read/Write 

0x02 

IP Access Register 

Write Only 

0x04 

Upper Address Register 

Write Only 

0x06 

Control and Status  

Read/Write 

Figure 5     Register Map for the Flex/104A 

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Summary of Contents for Flex/104A

Page 1: ...Flex 104A PC 104 Carrier Board User s Manual SBSTechnologies Inc Subject to change without notice Hardware Revision A Part 89002055 Rev 1 0 20050119 StockC heck com Downloaded from StockCheck com...

Page 2: ...ologies reserves the right to make any changes in the devices or device specifications contained herein at any time and without notice Customers are advised to verify all information contained in this...

Page 3: ...OBES 3 ADDRESSING 4 PC INTERRUPT SWITCH 4 FLEX 104A RESET SWITCH 5 PC 104 ACCESSES 5 IP ADDRESSING ON THE FLEX 104A 5 PROGRAMMING 6 REGISTER MAP 6 CONTROL STATUS REGISTER 7 IP ACCESS REGISTER 8 UPPER...

Page 4: ...IN ASSIGNMENT FOR EXTERNAL STROBE CONNECTOR 4 FIGURE 3 SHUNT POSITIONS FOR PC 104 ADDRESSING 4 FIGURE 4 SWITCH POSITIONS FOR PC INTERRUPTS 5 FIGURE 5 REGISTER MAP FOR THE FLEX 104A 6 FIGURE 6 IP ACCES...

Page 5: ...x 104A carrier boards combine the IndustryPack bus for flexible analog and digital I O and PC 104 for low cost embedded control to create a powerful system solution for embedded applications The Flex...

Page 6: ...2 Figure 1 Flex 104A Carrier Block Diagram E1 E2 P3 P7 P4 P1 P2 P5 P6 SLOT A SLOT B StockC heck com Downloaded from StockCheck com...

Page 7: ...numbers in this table corresponds to the physical placement of pins on the IP connector Thus this table may be used to easily locate the physical pin corresponding to a desired signal Pin 1 is marked...

Page 8: ...0 E1 1 to E1 2 E2 2 to E1 3 0x320 Default E1 2 to E1 3 E2 1 to E2 2 0x340 E1 2 to E1 3 E2 2 to E2 3 Not Allowed Figure 3 Shunt Positions for PC 104 Addressing PC Interrupt Switch SW4 is a 10 position...

Page 9: ...f the BIOS is set up for zero wait state accesses the Flex 104A will not operate correctly since the IOCHRDY signal is ignored Selecting one or more of wait states will correct the problem IP Addressi...

Page 10: ...pecified in the IP Access Register While the access is in process the IP Wait bit in the Control and Status Register is asserted high Once the access is complete the bit returns to zero Before startin...

Page 11: ...Time Out Status TM Status R This bit is asserted if an IP access has timed out When an access is started a timer internal to the Flex 104A is enabled If after 64 s an acknowledge has not been detecte...

Page 12: ...bits correspond to six dedicated address bits on the IP bus When accessing an IP the value of the offset location for a given register on the IP must be programmed into this field Remember that the Fl...

Page 13: ...ing the data register Data Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Bit IP D15 0 Read IP D15 0 Write 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Reset The Flex 104A is only capable of 16 bit addresses to th...

Page 14: ...se are identified as Industry Pack A Industry Pack B After an IP has been installed four stainless steel screws may be used to secure the IP to the carrier board This is normally necessary only in hig...

Page 15: ...ock Rate 8 MHz I O Interconnect Two 50 pin connectors Power Requirements 5 VDC TBD mA typ Additional power is consumed by IndustryPacks Environmental Operating temp 0 to 70 C 40 to 85 C Flex 104 ET an...

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