– 2 –
Table 1-1. CCD Pin Description
Fig. 1-1. CCD Block Diagram
1. OUTLINE OF CIRCUIT DESCRIPTION
1-1. CA1 and A PART OF CP1 CIRCUIT
DESCRIPTIONS
Around CCD block
1. IC Configuration
CA1 board
IC901 (ICX451DQF) CCD imager
CP1 board
IC931 (H driver, CDS, AGC and A/D converter)
2. IC901 (CCD imager)
[Structure]
Interline type CCD image sensor
Image size
Diagonal 6.67 mm (1/2.7 type)
Pixels in total
2140 (H) x 1564 (V)
Recording pixels
2048 (H) x 1536 (V)
Pin No.
1
Symbol
2
3
4
5
6
7
8
9
10
Vø
6
Vø
5B
Vø
5A
Vø
4
Vø
3B
Vø
3A
Vø
2
V
ST
V
HLD
Pin Description
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal addition control clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Vertical register transfer clock
Horizontal addition control clock
Vø
1
Vertical register transfer clock
Pin No.
11
Symbol
12
13
14
15
16
17
18
19
20
V
OUT
V
DD
øRG
GND
GND
øSUB
C
SUB
Hø
1
Hø
2
Pin Description
Signal output
Circuit power
Reset gate clock
Horizontal register transfer clock
GND
GND
Substrate clock
Substrate bias
Horizontal register transfer clock
V
L
Protection transistor bias
3. IC934, IC935 (V Driver) and IC931 (H driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD.
IC934 and IC935 are V driver. In addition the XV1-XV6 sig-
nals which are output from IC101 are the vertical transfer
clocks, and the XSG signal is superimposed at IC934 and
IC935 in order to generate a ternary pulse. In addition, the
XSUB signal which is output from IC101 is used as the sweep
pulse for the electronic shutter. A H driver is inside IC931,
and H1, H2 and RG clock are generated at IC931.
4. IC931 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to Pin
(29) of IC931. There are inside the sampling hold block, AGC
block and A/D converter block.
The setting of sampling phase and AGC amplifier is carried
out by serial data at Pin (37) of IC911. The video signal is
carried out A/D converter, and is output by 10-bit.
Fig. 1-2. IC931 Block Diagram
CCDIN
RG
H1-H4
VD
HD
SDATA
SCK
SL
CLI
CLPOB
CLPDM
DOUT
VRB
VRT
PRECISION
TIMING
CORE
SYNC
GENERATOR
PxGA
VGA
ADC
12
2~36 dB
PBLK
VREF
CLAMP
INTERNAL
REGISTERS
INTERNAL
CLOCKS
CDS
CLAMP
HORIZONTAL
DRIVERS
4
8
1
18
19
20
2
3
4
5
6
7
16
17
Gb
B
R
Gb
R
Gb
Gr
B
Gr
B
B
Gr
B
Gr
R
Gb
R
Gb
Gb
B
R
Gr
R
Gr
9
C
SUB
V
L
V
ST
Gb
R
B
Gr
Gb
R
B
Gr
14
11
13
12
V
DD
GND
V
OUT
15
GND
10
V
HLD
(Note)
(Note) : Photo sensor
Horizontal register
Vertical register
