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Block Diagrams
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5-2
Output
Voltage
Regulation
user
interface
IC
interface
Housekeeping
Input Power
Management
PM6050
VDD_P
(Pad regulator)
VDD_C
(Core regulator)
VDD_A
(Analog regulator)
VREG_BT
(Bluetooth regulator)
VREG_SYNT
VREG_TCXO
VREG_RFTX
VREG_RFRX
MIC
section
PCM
CODEC
I2C interface
Receiver
section
CLK & PLL
AK2430
RF
BLOCK
JTAG
KEY
MIC
MOTOR
HFK_SPK
IF
CONNECTOR
USIM
JTAG
interface
SBI
(Serial Bus Interface)
Bluetooth
OR
GPIO_INT
DAI interface
OR
GPIO_INT
General
PDM
ADC
CODEC
PCM interface
OR
GPIO_INT
I2C
interface
user
interface
MMC controller
OR
GPIO_INT
UART 0
UART 1
UART 2
RF controller
&
interface
MSM6200
YAMAHA
YMU762
LCD
(SUB+MAIN)
MEMORY
256M NAND
&
128M SDRAM
(K5D55729YCM)
MEMORY
256M FLASH
(RD28F256J3AM)
PHONE MEMORY
(AM50DL128BG)
48MHz
CELL COIN
TCXO
HFK_MIC
EAR_REC
SPK_REC
HFK
SPK
13.5MHz
CLK/PCM CLK
DATA
SENSOR
JTAG
DSP
for
audio
SDRAM
interface
MEMORY
interface
I2C
interface
JTAG
interface
UART
HOST
interface
SD CARD
interface
MA55133
Video
Capture
/
Filtering
Video
CODEC
Video
Display/
Filtering
PCLK
Hsync/Vsync
YUV(0:7)
CLK/TFT_RST
Hsync/Vsync
VDO(2:7)
UART 0
IF interface
FROMD(0:15)
DRAMD(0:15)
FROMA(1:23)
DRAMA(0:11)
ROM_CS
WE/OE
WE/
CLK/
CLK_EN
NAND_CS/
RAS/CAS
FROMD(0:15)
AD(0:15)
A(1:23)
CS/WE/OE
32.768kHz
A(1:16)
AD(0:7)
RST/CS/WE/OE
RST
sleep
control
CLK
USB
13.5MHz
RST
13.5MHz
AD(0:7)
LCD_CS/RST
EL_EN
MSM6200
RAM_CS/RST
RST
FROMD(0:7)
CS/RST/
WE/OE
RST
MLCD_CS
2. Base Band Solution Block Diagram
