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Circuit Description
5-12
SF700AT
5-4-1 Transmit Circuit
This circuitry controls transmission of analog
signals from the MODEM. Output voltage from
the MODEM is buffered through the LIU board
and OP amp after signal smoothing and filtering,
and finally output to the line.
5-4-2 Receive Circuit
In receive mode, analog signals from the LIU
board are transferred to RX IN through the BPF
and smoothing filter.
5-5-1 Transmit Path
Voice signal from the condenser microphone is
amplified through OP Amp(U2) in the OPE PBA.
This signal is received CODEC1(U22) through
LPF. LPF (Low Pass Filter) consisting of R100 and
C95 is an anti-aliasing filter to clear the aliasing
noise occuring while sampling the signal. Q9 and
Q11 compose ALC (Automataic Limit Controller)
circuit. CODEC 1 (U22) converts the voice signal
from microphone into digital and CODEC 0 (U24)
converts the digital signal from voice coprocessor
into analog to emit it to line output.
5-5-2 Receive Path
CODEC 0 converts the voice signal from line into
digital and sends it to DSPG. CODEC 1 converts
the digital output from DSPG into analog signal
and sends it to analog MUX (U12 ). The signal is
amplified by Audio amp and sent to Speaker.
5-5-3 Mic Input Path
Transmit path functions as MIC input path.
Outgoing messages and memo messages out from
CODEC 1 are stored in the voice memory (U21)
through the DSPG DRAM controller.
5-5-4 Line Input and Play Path
Incoming signal from line are stored in the voice
memory (U21) through CODEC 0 (U24) and DSPG
DRAM controller. When it is played, DSPG
processes the data stored in the voice memory and
sends them out to LIU through CODEC 0 and
R146. To playback through the speaker, DSPG
sends them out to speaker through R108, MUX
(U12), and OP amp(U16).
5-5-5 DSPG
This circuit consists of Host Interface, Memory
Interface, CODEC Interface, Speakerphone
Processor, and DSP core. Host Interface sends and
receives data to and from IFC. Memory Interface
sends and receives the compressed voice data to
and from DRAM (or EPROM) to play back and
record voice data. Speakerphone processor
controls TX and RX path, and is connected to line
and the user through CODEC interface. DSP core
communicates with host IFC through Host
Interface.
5-5-6 Voice Backup
+5V is supplied for the voice memory through
VBT when power is on. When power is off, +5V is
supplied from the battery. 9V Lithum battery is
used for backup battery.
5-5 Speakerphone and TAD
Speakerphone circuit consists of transmit path, receive path, and voice coprocessor (D6365A) to convert the
transmit path and receive path. TAD circuit consists of voice coprocessor to record and play voice messages
and voice memory.
Summary of Contents for SF700AT
Page 2: ...Samsung Electronics Co Ltd APR 1998 Printed in Korea JF68 60A ELECTRONICS ...
Page 34: ...Circuit Description 5 16 SF700AT MEMO ...
Page 52: ...8 1 SF700AT 8 Exploded Views and Parts Lists 8 1 Total Assembly ...
Page 54: ...SF700AT 8 3 Exploded Views and Parts Lists 8 2 Ass y OPE Unit ...
Page 56: ...Exploded Views and Parts Lists SF700AT 8 5 8 3 Ass y RX COVER ...
Page 61: ...Exploded Views and Parts Lists 8 10 SF700AT 8 7 Ass y Base ...
Page 63: ...Exploded Views and Parts Lists 8 12 SF700AT 8 8 Harness ...