Circuit Diagram
6-4
B
SAMSUNG
5
CLOSE TO D5
-
8
Engineer
TITLE
* AUDIO : 150 -- 180
06
DOC CTRL CHK
2
E14
-
GPIO(15)
L14
(GPIO19)
(GPIO20)
5
C
B
M15
2
Time
1
C
A
7
D9
6
A
D10
3
MFG CTRL CHK
1
D
(GPIO21)
3
D
R&D CHK
SCH-A399_REV2.0-MSM
D
(GPIO18)
- IF USB IS NOT USED PLACE XTAL48_IN PIN TO GND
Drawn by
QA CHK
Size
D5
Sheet1
M4
7
GPIO(31)
GPIO(37)
GPIO(39)
Date Changed
GPIO(40)
GPIO(41)
6
8
Drawing Number
+
E
E
4
F15
+
P8
Changed by
NO : 100 -- 199
K4
4
REV
C.K.KIM
H.G.KIM
5:05:06 pm
Monday, November 12, 2001
user12
R161
100K
10NF
C101
C106
100NF
V_MSMP
ROM_CS1_N
C110
100NF
C122
27PF
10K
R129
3
2
R132
100K
Q101
2SA1576FRT106
1
R167
2.2K
R118
1K
C118
C142
12NF
RD_N
10NF
3.0TCXO
V_MSMP
R136
1K
100NF
C144
R151
1K
R146
100K
100NF
C104
C152
22NF
R134
100K
100PF
C127
V_MSMC
RAM_CS1_N
V_EAR
U140
TC7S04FU(TE85L)
3
GND
2
IN
NC
1
OUT
4
VCC
5
R131
3.3K
10NF
C112
100NF
C134
V_MSMP
10K
R122
100NF
C129
C137
100NF
100NF
100NF
C119
C111
C116
10NF
V_MSMC
R111
18K
1K
R152
1UF
C148
C103
10NF
7
RESOUT
U170-2
TC75W56FK-TE12L
5
6
C113
100NF
R109
91K,1%
47NF
C151
100NF
C140
R102
V_MSMP
4.7K
C121
10NF
100,1%
R112
V_MSMP
V_RFTXD
V_EAR
V_EAR
C133
100NF
100NF
C145
2
3
4
5
V_MSMA
Q100
UMC5NTL
1
10NF
C138
R108
510
R141
10K
V_MSMP
C120
100NF
100NF
C131
10NF
C115
C117
100NF
100NF
V_MSMP
C149
C141
100NF
R145
180K
C139
22NF
R119
3
GND
OUT
2
VCC 1
1K
510K
R143
A3210ELH
U199
V_EAR
R125
100K
10NF
R156
510
V_MSMP
C109
10NF
C136
10NF
C114
R114
R101
0
10K
VCC
8
WP
7
1.2K
R162
U131
AT24C256-10UI-2.7-T.R
A0
1
2
A1
3
A2
GND
4
6 SCL
SDA
5
R163
10K
R164
V_MSMA
30K
22NF
C150
C153
C100
10NF
10K
22NF
R121
100NF
100NF
C157
V_MSMA
C108
100PF
C123
1K
R135
R130
10K
100NF
C102
1NF
C160
C105
10NF
10NF
10K
V_MSMP
C107
MC-146(32.768KHz,20ppm)
OSC100
2
3
4
1
R144
R140
180K
R126
12NF
C143
10K
4.7NF
C132
R110
1.2K
100K
R133
V_MSMC
C126
27PF
V_TCXO
R165
100K
TC75W56FK-TE12L
U170-1
4
3
2
8
1
C156
100NF
C155
100NF
_WE
C6
_WP/ACC
C5
G3
VSS1
VSS2
J9
_CE1S
J2
H2
_CEF
C4
_LB
H3
_OE
D5
_RESET
D4 _UB
NC
B10
C1 NC
NC
E9
F1 NC
RY/_BY E5
G8
SA
VCCF
J5
J6
VCCS
NC L6
NC L10
M1
NC M10
NC
NC
A10
B1 NC
NC
B5
B6
NC
H4
DQ9
A1 NC
NC
F9
F10
NC
NC
G1
G10
NC
NC
L1
L5
NC
H8
DQ15/A-1
DQ2
K4
H5
DQ3
DQ4
H6
K7
DQ5
DQ6 G7
DQ7 J8
DQ8
K3
CIOS
K6
J3
DQ0
DQ1
G4
J4
DQ10 K5
DQ11
DQ12
J7
DQ13
H7
DQ14 K8
F3
A4
E3
A5
D3 A6
C3 A7
C7
A8
A9
E7
D6
CE2S
H9
CIOF
A15
D9
A16
G9
F4 A17
A18
E4
D7
A19
E2
A2
A20
E6
A3
D2
DS42553
G2
A0
A1
F2
A10
F7
C8
A11
A12
D8
E8
A13
F8 A14
V_MSMP
U110
10NF
1K
R150
C158
VDD_C2
VDD_C3
M15
VDD_P1
E14
VDD_P2
M4
P8
VDD_P3
WDOG_EN
M16
XT
AL48_IN
U15
XT
AL48_OUT
U14
C12
YAMN1
C3
TMS
TRK_LO_ADJ
B11
TRST_N
C6
A12
TX_AGC_ADJ
D5
VDD_A1
VDD_A2
D10
VDD_A3
F4
F15
VDD_A4
VDD_A5
L14
VDD_C1
D9
K4
SBDT
B2
SBST
A8
SLEEP_N
SLEEP_XT
AL_IN
T17
SLEEP_XT
AL_OUT
R17
SYNTH_LOCK
C10
D4
TCK
TCXO
A17
TDI
B4
A5
TDO
TMODE
B17
RESIN_N
RESOUT_N
P17
E17
RFR_N
J3
RFR_N2
RINGER
C14
R15
ROM_CS1_N
P4
ROM_CS2_N
RSVD1
A16
B16
RSVD2
A11
RX_AGC_ADJ
SBCK
A1
B1
PA_R0
A9
D7
PA_R1
C8
PDM1
PDM2
B9
B10
Q_OFFSET
Q_OUT
B5
Q_OUT_N
A6
P14
RAM_CS1_N
RAM_CS2_N
N4
R14
RD_N
N17
G17
MICFBN
G14
G15
MICFBP
MICINN
G16
MICINP
H17
MICOUTN
J17
MICOUTP
H16
U17
MODE0
R16
MODE1
PA_ON
D6
PA_ON2
C11
KEYSENS4
P12
LCD_CS_N
LCD_EN
P13
LNA_GAIN
B12
C7
LNA_RANGE0
LNA_RANGE1
C9
LWR_N
P16
MIC1N
K17
J16
MIC1P
MIC2N
H15
MIC2P
H14
MICBIAS
HKADC6
G2
P15
HWR_N
IDLE_N
B7
A10
I_OFFSET
I_OUT
A7
B6
I_OUT_N
E3
KEYSENS0
KEYSENS1
D2
D1
KEYSENS2
KEYSENS3
G1
H2
R3
GPIO7
N1
GPIO8
P3
N2
GPIO9
P6
GP_CS_N
HKADC0
E2
HKADC1
F3
HKADC2
E1
HKADC3
F2
HKADC4
G3
F1
HKADC5
E4
GPIO35
A3
GPIO36
C2
P1
GPIO4
T14
GPIO42
GPIO43
U16
T15
GPIO44
GPIO45
T16
GPIO46
T13
GPIO47
U13
P2
GPIO5
GPIO6
J1
GPIO24
K2
GPIO25
L3
GPIO26
GPIO27
A4
B8
GPIO28
GPIO29
A2
R1
GPIO3
B3
GPIO30
GPIO32
C1
D3
GPIO33
GPIO34
GPIO1
M1
GPIO10
N3
GPIO1
1
GPIO12
M2
GPIO13
L1
GPIO14
M3
L2
GPIO16
GPIO17
K1
R2
GPIO2
J2
GPIO22
GPIO23
K3
GND12
GND2
P5
GND3
G4
GND4
C5
D1
1
GND5
K15
GND6
F14
GND7
GND8
H3
GND9
D8
F16
GND_RET
GPIO0
U1
T1
H1
DP_TX_DA
TA
2
EAR10N
M17
EAR10P
L16
K14
EAR20
B15
FM_RX_IDATA
B14
FM_RX_QDATA
A15
FM_RX_STB
D12
GND1
L15
GND10
GND11
P9
L4
T10
U9
D4
P10
D5
R10
D6
D7
T9
D8
U8
D9
R9
C4
DAC_IREF
DP_RX_DA
TA
D16
DP_RX_DA
TA
2
J4
DP_TX_DA
TA
D17
C_RX_QDATA2
C_RX_QDATA3
A13
D0
R12
D1
U10
T8
D10
D11
U7
R8
D12
D13
T7
U6
D14
D15
P7
D2
R11
D3
D14
AUX_PCM_DOUT
F17
AUX_PCM_SYNC
CCOMP
E15
C15
CTS_N
CTS_N2
H4
A14
CX8_FM_CLK
C17
C_RX_IDATA2
C_RX_IDATA3
C16
C_RX_QDATA0
D13
C13
C_RX_QDATA1
B13
U11
A6
T11
A7
P11
R7
A8
T6
A9
AUX0N
K16
AUX0P
L17
J15
AUX1N
AUX1P
J14
D15
AUX_PCM_CLK
AUX_PCM_DIN
E16
U4
T3
A16
A17
R4
U3
A18
A19
U2
U12
A2
T2
A20
A21
N14
A22
M14
A3
R13
T12
A4
A5
U100
MSM3100C
N16
A0
A1
N15
A10
U5
R6
A11
T5
A12
A13
T4
R5
A14
A15
R153
1K
C135
5.6NF
V_RING
R107
8.2K
C159
C154
100NF
2.2K
100NF
R154
R155
100K
100K
R124
68NF
C124
R148
0
100K,1%
C125
10NF
WDOG_EN
R113
SCAN(2)
RI
MOTOR_EN
SCL
SDA
SCAN(1)
CD
SCAN(0)
PS_HOLD
TCXO_EN
UIM_RESET
ALERT_LED_N
SBST
TCK
TDI
TDO
TMODE
TMS
TRST_N
CHG_ON DC_IN_N
DSR
SCAN(4)
SCAN(3)
LED_EN
AUDIO_CTRL
UIM_RXD
UIM_MSM_TXD
RTS
SEND_END
DP_RX_DATA
EL1_EN
DP_TX_DATA
REED_SW
THERM_DET
BAT_ID
ICHRG
CTS
SBCK
SBDT
D(2)
D(1)
D(0)
D(0:15)
RAM_CS1_N
A(0)
CX8_FM_CLK
TCXO_IN
PON_RESET_N
RAM_CS2_N
A(1:21)
REED_SW
LNA_GAIN
LWR_N
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
A(9)
A(8)
A(7)
A(6)
A(5)
A(4)
A(3)
A(2)
A(1)
A(21)
A(20)
A(19)
A(18)
FROM_WP
A(11)
A(10)
A(1)
A(0)
ROM_CS1_N
RD_N
A(17)
A(16)
A(15)
A(14)
A(13)
A(12)
A(11)
A(10)
RX_QDATA1
RX_QDATA0
RX_IDATA3
RX_IDATA2
A(9)
A(8)
A(7)
A(6)
A(5)
A(4)
A(3)
SCAN(5)
A(21)
A(20)
A(2)
A(19)
A(18)
A(17)
A(16)
A(15)
A(14)
A(13)
A(12)
RX_IDATA0
RX_IDATA1
SPK_IN-
PA_IREF
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
D(1)
D(0)
RX_QDATA3
RX_QDATA2
LWR_N
EAR_DET
LCD_CS_N
ON_SW_SENSE
KEYSENS(3)
KEYSENS(2)
KEYSENS(1)
I_OUT_N
I_OUT
IDLE_N
LCD_CS2_N
FROM_WP
DTR
UIM_PWR_EN_N
YAMN1
TCXO_CLK
ROM_CS1_N
RESOUT_N
RD_N
RAM_CS2_N
RAM_CS1_N
Q_OUT_N
Q_OUT
PA_R0
PA_ON
SLEEP_N
PDM1
PLL_CLK
PLL_DATA
SCL
SDA
SYNTH_LOCK
TCXO_CLK
H_RX_AUDIO
MIC+
PON_RESET_N
EAR_DET
SEND_END
EAR_REF
KEYSENS(0)
PLL_EN
A(0:20)
D(0:15)
SLEEP_N
TRK_LO_ADJ
RX_AGC_ADJ
Q_OFFSET
I_OFFSET
TX_AGC_ADJ
H_TX_AUDIO
6-4 Logic Circuit Diagram
