Samsung S5PC110, Manual

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S5PC110_UM 4 POWER MANAGEMENT
4-9
4.3.3 IDLE MODE
If Cortex-A8 is not required to operate, the clock for Cortex-A8 can be disabled internally. This saves the dynamic
power consumption. To disable clock to Cortex-A8, execute a Wait-For-Interrupt instruction. The remaining parts
of the chip (except state of Cortex-A8 core) keep their operating states in NORMAL, that is, the running modules
are still running, clock-gated modules are still clock-gated, and power-gated modules are still power-gated.
To enter the IDLE mode,
1. Set CFG_STANDBYWFI field of PWR_CFG to 2’b00.
2. Execute Wait-For-Interrupt instruction (WFI).
To exit the IDLE mode, wake up sources (For more information, refer to Section 4.6 "Wakeup Sources").
4.3.4 DEEP-IDLE MODE
If Cortex-A8 is not required to operate and to reduce CPU power, the power to Cortex-A8 core can be gated
internally. This saves the static leakage consumption.
To save the static leakage consumption, set the register IDLE_CFG in SYSCON, and execute a Wait-For-Interrupt
instruction.
There are three options in DEEP-IDLE mode, namely:
1. The remaining parts of the chip keep their operations in NORMAL mode.
2. The remaining parts of the chip keep their states in NORMAL mode.
3. For low power MP3 playback, TOP block and SUB block is also power-gated, but only Audio block is still
power
"ON".
To select the above options, set TOP_LOGIC field of IDLE_CFG register in SYSCON, that is, TOP domain can
either be power-on or power-gated by the setting of TOP_LOGIC field of IDLE_CFG register, before entry into
IDLE mode.
•
TOP_LOGIC = 2’b01: TOP block and sub-blocks keep their states in NORMAL mode. Audio block is running
the operation.
•
TOP_LOGIC = 2’b10: TOP block, sub-blocks, and Audio block is running the operation.