S5PC110_UM
4 POWER MANAGEMENT
4-25
4.6 WAKEUP SOURCES
Table 4-6 Relationship Among Power Mode Wakeup Sources
Power Mode
Wakeup Sources
All interrupt sources
I2S (in audio block)
MMC0, MM1, MMC2, MMC3
TSADC
System
Timer
External interrupt sources (EINT)
RTC Alarm
RTC TICK
KEYIF
IDLE
DEEP-IDLE
(1)
DEEP-IDLE
(2)
STOP
or
DEEP-
STOP
SLEEP
HDMI CEC
NOTE:
1. If TOP block on
2. If TOP block off
4.6.1 EXTERNAL INTERRUPTS
External interrupts are the common wake-up source of IDLE (including DEEP-IDLE), STOP (including DEEP-
STOP), and SLEEP modes. The logic for external interrupt configuration such as polarity, edge/level sensitivity,
and masking resides in the GPIO. It can be modified through GPIO register setting before entering power down
modes. The external interrupt handling logic holds the external interrupt information until Cortex-A8 clears the
information. It allows Cortex-A8 to handle the external interrupt after wake-up.
4.6.2 RTC ALARM
The Real Time Clock (RTC) has 32-bit counter to wake up the system after specified time. If the timer alarm
triggers, the SYSCON wakes up the system and sets the RTL_ALARM field of WAKEUP_STAT register to 1. After
the wake-up, Cortex-A8 can refer the WAKEUP_STAT register to find out the cause of wake up.
4.6.3 SYSTEM TIMER
System Timer is newly introduced module in S5PC110. It supplements PWM timer, which suffers from
accumulation of time deviation when operated in variable tick mode. On the contrary, System Timer is free from
such deviation and can be a preferrable choice for variable tick generation.
In DEEP-IDLE, STOP, and DEEP-STOP mode, there can be no system clock when TOP block is power-gated.
Therefore, RTC is used to generate timing tick instead of PWM timer, but by using this clock, timing count is not
controlled to meet exact 1ms OS time tick since RTC clock does not have high resolution. On the other hand,
System timer has the function to generate interrupts at various interval, and do not require manual setting. Thus, it
does not wake up the chip too often, and provides accurate 1ms timing ticks. It uses an external crystal clock,
RTC clock and the generated clock from SYSCON as clock input.
For System Timer to operate in DEEP-IDLE, STOP, and DEEP-STOP mode, power to System Timer is not gated.
The wakeup event from System Timer will wake up S5PC110 from DEEP-IDLE, STOP, and DEEP-STOP mode.
Summary of Contents for S5PC110
Page 4: ...Section 1 OVERVIEW ...
Page 28: ...Section 2 SYSTEM ...
Page 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Page 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Page 474: ...Section 3 BUS ...
Page 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Page 506: ...Section 4 INTERRUPT ...
Page 537: ...Section 5 MEMORY ...
Page 540: ......
Page 703: ...Section 6 DMA ...
Page 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Page 737: ...Section 7 TIMER ...
Page 795: ...Section 8 CONNECTIVITY STORAGE ...
Page 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Page 1100: ...Section 9 MULTIMEDIA ...
Page 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Page 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Page 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Page 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Page 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Page 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Page 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Page 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Page 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Page 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Page 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Page 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Page 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Page 1798: ...Section 10 AUDIO ETC ...
Page 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Page 1951: ...Section 11 SECURITY ...
Page 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Page 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Page 2005: ...Section 12 ETC ...
Page 2039: ...Section 13 SIZE BALL MAP ...