Samsung DVD-R157, Service Manual

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Circuit Operating Descriptions
Samsung Electronics 13-5
13-2-1 GENERAL DESCRIPTION
SAMSUNG S5L3210 MPEG AV Codec is designed to provide a cost-effective, low power and high performance
DVD recorder solution for DVD-VR, DVD-Video, DVD-Audio & many of CD applications. To reduce total system
cost, S5L3210 also provides the following features: a front-end controller, a back-end decoder, a control CPU with
separate 4KB Instruction and 4KB Data Cache, improved audio DSPs, a programmable video encoder with a dual
output capability of interlaced and progressive scan, a DDR memory controller, 4-channel Timers with PWM, I/O
Ports, 6-channel 10-bit Video DACs, 2-channel PWM processors for Hi-fi Audio, 2-channel UARTs with hand-
shake, IIC-BUS interface, IIS interface, SPI, ATAPI, IEEE1394, USB 2.0 Full & Low Speed Host I/F and PLL for
clock generation.
13-2-2 A/V Processor (DIC1) Functional Description
1) RISC processor architecture
· ARM946ES Core processor
· Fully 16/32-bit RISC architecture.
· Harvard cache architecture with separate 4KB Instruction and 4KB Data cache
· Protection unit to partition memory and set individual protection attributes for each partition
· Up to 160 MHz operating frequency
2)
Memory controller
· Address space: 128M bytes for each bank (Total 1Gbyte space)
· Supports programmable 8/16-bit data bus width for ROM/SRAM interface.
· Supports 16-bit data bus width for DDR-SDRAM interface.
· 3 memory banks. - 2 memory banks for ROM, SRAM etc. - 1 memory banks for SDRAM
· Fully Programmable access cycles for all memory banks.
· Supports external wait signal to expand the bus cycle.
3)
Cache memory
· 64 way set-associative cache with I-Cache (4KB) and D-Cache (4KB).
· 8-words per line with one valid bit and two dirty bits per line
· Pseudo random or round robin replacement algorithm.
· Write through or write back cache operation to update the main memory.
· The write buffer can hold 8 words of data and four address.
4) Clock & power manager
· Low power consumption
· On-chip PLLs
· Clock can be fed selectively to each function block by software.