RTD Embedded Technologies, Inc.
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23
DM35956HR User’s Manual
5
Functional Description
Block Diagram
The Figure below shows the functional block diagram of the DM35956HR. The various parts of the block diagram are discussed in the
following sections.
Figure 8: DM35956HR Block Diagram
PCIe Switch
The PCI Express Switch provides the bus interface to the DM35956HR. The switch includes GPIO that are accessible from its Configuration
Space, which is configured as a generic bus. This is a low speed interface that does not provide support for interrupts or DMA.
The PCIe Switch also provides lane repopulation. One lane is used as the uplink to the CPU. On the opposite side of the board it is replaced
by a lane from the switch. This allows a virtually limitless number of boards to be added to the system.
EPLD
The EPLD provides glue logic between the PCIe interface and the on-board functions.
Relays and Opto-Isolators
The relays and opto-isolators provide the isolation and input/output circuit for the digital I/O.
PCIe Switch
PC
Ie
Bu
s
Isol
at
ed
In
pu
t C
on
ne
cto
rs
PCIe x1
Link
Repopulated PCIe x1
EPLD
Opto-
Isolators
Isol
at
ed
Out
pu
t C
on
necto
r
Relays
