RTD Embedded Technologies, Inc.
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12
ADP065 User’s Manual
4
Functional Description
4.1
Functional Diagram
The Figure below shows the functional diagram of the ADP065. The various parts of the block diagram are discussed in the following sections.
Figure 4: ADP065 Functional Diagram
4.2
Backwards Compatibility with USB 2.0
A USB 3.0 connection requires three differential pairs on the PCIe bus connector. These are the TX and RX differential pairs for SuperSpeed,
and a bi-directional differential pair for high-speed, full-speed, and low-speed signaling rates. Typically, a USB 3.0 hub will use both sets of
signals, and USB devices will use one set or the other. If the CPU only provides USB 2.0 links (no TX and RX differential pairs for
SuperSpeed), the bi-directional differential pairs on the ADP065’s USB ports may be utilized to connect USB devices at high-speed, full-speed,
and low-speed signaling rates.
4.3
Power
The ADP065 only re5V (V
cc5
) to operate. Although not required, +5V Standby (V
cc5-STBY
) may be provided on the PCIe connector to
permit waking the system if supported by the host.
Acceptable voltage ranges for +5V (V
cc5
) and +5V Standby (V
cc5-STBY
) are listed in Table 1: Operating Conditions.
SAT
A L
ink 0
SATA Data Connector
(SATA2)
Bottom-side
PCIe/104 Type 2 Connector
USB 3.0 Connector
(USB2)
SATA Data Connector
(SATA1)
USB 3.0 Connector
(USB1)
SAT
A L
ink 1
U
SB 3
.0
L
ink 1
U
SB 3
.0
L
ink 0
