14/17
t
pdHL(HPD)
t
pdLH(HPD)
2
VDD
2
VDD
2.4V
t
sx(HPD)
0V
2
Vcc
t
pdHLRT(DDC)
t
pdLHRT(DDC)
HPD_SINK
HPD1
HPD2
HPD3
S1
S2
SDA_SINK
SDA1
SDA2
SDA3
VDD
1.5V
t
SX
(DDC)
1.5V
VDD
0V
t
pdHLTR(DDC)
t
pdLHTR(DDC)
t
fTX(DDC)
t
rTX(DDC)
t
fRX(DDC)
t
rRX(DDC)
80%
20%
80%
20%
RX to TX
TX to RX
V
IL
Figure 5-5. DDC and HPD Timing Definitions
