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© 2021 ROHM Co., Ltd.
No. 64AN082E Rev.001
Oct. 2021
Application Note
BD91N01NUX Function Description
Table 3. The result of the detection.
CC1 terminal
CC2 terminal
Result
SWDRV
< 0.15V
< 0.15V
Failures*
OFF(H)
0.25V
~
2.18V
< 0.15V
Normal
ON(L)
< 0.15V
0.25V to 2.18V
0.25V
~
2.18V
0.25V to 2.18V
Not comply
with Type-C
OFF(H)
> 2.5V
Don’t care
Failures on
pull up in
Source side
Don’t care
> 2.5V
*In case of the power is applied to VB terminal.
Table 4 shows the specification in the Type-C standard
and this product finds any failures according to these
thresholds.
Table 4. The definition of the CC voltage range in Type-C standard.
Connect to
Definition
CC terminal voltage
Sink
Open
< 0.15V
Connection range
0.25V to 2.18V
USB Default
0.25V to 0.61V
USB Type-C 1.5A
0.70V to 1.16V
USB Type-C 3.0A
1.31V to 2.04V
Source
Open
> 2.5V
Regardless of the determined state (normal or failure),
the corresponding SWDRV terminal is NOT released
until the VBUS voltage falls equal to or below V
UVDET
.
Note that the state of SWDRV terminal is fixed and not
released even if different voltages are applied to both
CC1 and CC2 pins to confirm the behavior of the
device by using an external power source on the
evaluation in a Lab. This case may occur in a Lab, but
it doesn’t happen in the actual environment.
VBUS Over Voltage Protection
This product has an overvoltage protection function for
the VB terminal voltage (VBUS voltage). When a
voltage exceeding V
OVDET
is detected, the device turns
off the Pch-MOS FET and isolates the system from
Type-C receptacle
.
This condition latches off when the VBUS pin's
overvoltage detection state persists and is not released
until the VBUS voltage falls below V
UVDET.
The latched off-state does not occur when the
overvoltage pulse
width is less than “Auto Recovery
Pulse Width” t
3
, which then the device recovers to
normal condition immediately, where t
3
is defined at up
to 10
μs, therefore, the product always recovers from the
latched off-state if the pulse width applied is less than t
3
.
Specifically, the product recovers from the latched off-
state even if a pulse width of over 10
μs is applied. Note
that the t
3
value does not define the transition from the
latched-off state.
The detection result and VBUS Current
limitation
The product notifies the current capability of the Type-C
by asserting both TCC1 and TCC0, on the other hand
the product does not provide the current limitation for
the detected current capability. A system shall control
the current limitation for its drawing current according to
the current capability of the source device.
Under Voltage Lockout on VBUS
The product turns off the Pch-MOS FET on the VBUS
power line once the applied VBUS voltage is below
V
UVDET
. Once the VBUS voltage is below V
UVDET
all
connection states are cleared. From this, when the
VBUS voltage is greater than or equal to V
UVREL
connection detection is performed again, considering
the previous connection is maintained.
Removing Type-C plug from receptacle causes
disconnection from the Source and losing VBUS power
supply. Therefore, the device enters power off / reset
status. This behavior
doesn’t depend on the VDDIO.
Power supplying to a system during
booting up
Since this product uses a Pch-MOS FET to control the
VBUS power line, the VBUS voltage is supplied to the
later stage until BD91N01NUX applies the Gate voltage
of the Pch-MOS FET at startup and the off is confirmed
as shown in Figure 1.
Please note that the supplied voltage and its duration
strongly depend on the capacitance between Pch-MOS
FET or something in the actual system. Please use any
Pch-MOS FETs that has less gate capacitance (C
iss
) if
a system requires to reduce the supplied voltage to the
later stage.