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Network operation and remote control
R&S
®
FSVA3000/ R&S
®
FSV3000
779
User Manual 1178.8520.02 ─ 08
STATus:QUEStionable:SYNC register
The
STATus:QUEStionable:SYNC
register is used by the R&S
FSV/A applications
and is described in the individual sections (manuals) for each application.
Status byte (STB) and service request enable register (SRE)
..............................779
IST flag and parallel poll enable register (PPE)
.................................................... 780
Event status register (ESR) and event status enable register (ESE)
..................................................................................781
............................................................................. 782
STATus:QUEStionable:ACPLimit register
............................................................. 783
STATus:QUEStionable:EXTended register
........................................................... 784
STATus:QUEStionable:EXTended:INFO register
..................................................785
STATus:QUEStionable:FREQuency register
........................................................ 785
STATus:QUEStionable:LIMit register
.................................................................... 786
STATus:QUEStionable:LMARgin register
............................................................. 786
STATus:QUEStionable:POWer register
................................................................ 787
STATus:QUEStionable:TEMPerature register
.......................................................788
STATus:QUEStionable:TIMe register
....................................................................788
11.2.2.1
Status byte (STB) and service request enable register (SRE)
The
STatus Byte
(STB) is already defined in IEEE 488.2. It provides a rough over-
view of the instrument status by collecting the pieces of information of the lower regis-
ters. A special feature is that bit 6 acts as the sum bit of the remaining bits of the status
byte.
The STB can thus be compared with the
CONDition
part of an SCPI register and
assumes the highest level within the SCPI hierarchy.
The STB is read using the command
The
STatus Byte
(STB) is linked to the
Service Request Enable
(SRE) register.
Each bit of the STB is assigned a bit in the SRE. Bit 6 of the SRE is ignored. If a bit is
set in the SRE and the associated bit in the STB changes from 0 to 1, a service
request (SRQ) is generated. The SRE can be set using the command
and read
using the command
*SRE?
.
Table 11-2: Meaning of the bits used in the status byte
Bit No.
Meaning
0...1
Not used
2
Error Queue not empty
The bit is set when an entry is made in the error queue. If this bit is enabled by the SRE, each
entry of the error queue generates a service request. Thus an error can be recognized and
specified in greater detail by polling the error queue. The poll provides an informative error mes-
sage. This procedure is to be recommended since it considerably reduces the problems
involved with remote control.
Status reporting system