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Rockwell Automation Publication 440R-UM010A-EN-P - May 2015
Chapter 6
Pulse Testing Functions
When pulse testing is configured (start with Logic Setting 0), the outputs are
tested by the main transistor and then tested individually. The main transistor
test pulse is 50 µs wide. The pulse width on terminals 14 and 24 is 350 µs wide,
and the pulse width on terminals 51 and L61 is 200 µs wide.
Figure 24 - Output Pulse Test Width
show the pulse test pattern. This pattern depends on the
GLT configuration and its state.
shows the pulse pattern for E-stop
configurations. The pattern is repeated every 3750 ms.
Figure 25 - Output Pulse Test Pattern for E-stop Functions
shows the pulse test pattern on 51 and L61 when the GLT is
configured as two high side outputs. The pattern is repeated every 2639 ms.
Figure 26 - Output Pulse Test Pattern for Two High Side Guardlocking
shows the pulse test pattern on 51 and L61 when the GLT is
configured as a high side/low side outputs. Terminal 51 is referenced to L61, not
24V common. The pattern is repeated every 2639 ms.
Figure 27 - Output Pulse Test Pattern for High/Low Side Guardlocking
24V
0
0
0V
50 µs
350 µs
24V
0V
Main Transistor
14 & 24
0
200 µs
24V
0V
51 & L61
24
14
Terminal
24V
0V
24V
0V
24V
0V
24V
0V
L61
51
145
Approximate Time (ms)
220
290
439
585
2345
2487
3750
0
Terminal
24V
0V
24V
0V
L61
51
Approximate Time (ms)
154
1649
1753
2639 2793
4287
4391
0
Terminal
L61
51
Approximate Time (ms)
154
925
1132
1339
1545
2639 2793
3564
0