background image

RFL SMX3 / 21 

Page 17 of 22 

   Issue 1.4

User Manual 

 

08 June 2009

 

DIP Switch 6 settings

:  

 
 

Switch 6 – Clock and Timing Configuration 

8 7 

3 2 

RTS Time Out 

   Aggregate Speed 

kbit/s 

Clock 

Source 

Not Used 

Port C 

Port B 

 

00 =  64 

  00 = X.21 Port 

 

0 = Disabled 

0 = Disabled 

 

01 = 128 

  01 = Concat port 

 

1 = Enabled 

1 = Enabled 

 

10 = 192 

  10 = Master 

  

 

 

  

 

11 = 256 

  11 = Auto 

  

  

  

  

 

  V.24 Port RTS Timeout:   

 

Normally set to Enabled for a polling system. 
When Enabled, the effect of RTS ON is limited to 2 seconds, i.e. CTS and remote 
DCD turn OFF and TxD is blocked.  In order to recover, RTS  

presented 

to 

the 

port has to turn off and remain off for 2 seconds.  This feature is to prevent a faulty 
RTU of a SCADA system from interfering with traffic on the rest of the SCADA 
system. 
 
Do not set to Enabled when port is dedicated for use with MPR or other protection 
relay, or when testing with a data tester. 

 
 

  Timing source:  X.21 Port, Concatenation Port, Master, Auto, 

 

X.21 is the normal setting for applications where the SMX3/21 X.21 port is connected 
to a service synchronised with the network master clock. 

 

Concatenation Port is the setting used when an X.21 link needs to be synchronised to 
the network master clock signal from an 

adjacent

 link. Signal timing is via the 

concatenation port from the co-located unit. When used in conjunction with the 
modes Enabled as DCE, (or Enabled as DTE + Signal Timing X), the timing signal 
received from the concatenation port will be output onto the X.21port. 

 

Master is used where it is necessary for timing to be generated internally for SMX/21. 
The clock is generated internally and transmitted on X on either the X.21 Aggregate 
port or the Concatenation port. It is used with Enabled as DCE mode, (generally for 
test purposes only), and for Enabled as Concat mode where two units are 
interconnected via concatenation ports and the X.21 network service is unavailable. 

 

Auto locks timing to the X.21 port as a priority and to the Concatenation port if that 
fails.  When timing is locked to the Concatenation port and an acceptable clock 
appears on the X.21 port, timing source will revert to the X.21 port. This function has 
a special application for East-West applications where both X.21 and Concatenation 
ports receive network master clock timing.

 

This is not used when concatenating 

consecutive point to point links using the concatenation port to connect to an co-
located SMX3/21.

 

 

  Aggregate Speed: 64, 126, 192, 256 kbits/s 

 

Set to match the network clock speed. For X.21 networks operating at n = 1, set to 
64kbits/s. (Note: when using Channel A (X.21 port), it is not possible to use 64 or 
192kbits/s, but it is possible to use the V.24 ports alone) 

 

Summary of Contents for 21 Sub-MUX

Page 1: ...s plc U U Ut t ti i il l li i it t ty y y N N Ne e et t tw w wo o or r rk k k S S Sp p pe e ec c ci i ia a al l li i is s st t ts s s SMX3 21 Sub MUX X 21 V 24 Dual Protocol sub rate multiplexer User...

Page 2: ...rt 8 8 X 21 Data Port Channel A 10 9 V 24 Data Ports Channels B C 11 10 DIP Switches 13 11 LEDs 18 12 Power Input 19 13 Alarms 19 14 Example Configurations 20 15 Blank Setting Table 22 Issue Comments...

Page 3: ...with reversible mounting brackets permitting either the connectors or the LEDs to face the front of the rack SMX3 21 aggregates one X 21 data channel Channel A and two V 24 data channels Channel B Ch...

Page 4: ...Channel B is re transmitted onto a second point to point link at the aggregate level via the Concatenation Port For this to operate all links must be synchronised to the network master timing signal I...

Page 5: ...ame regardless of aggregate speed Data Channel Aggregate Speed 64kbit s 128kbit s 192kbit s 256kbit s Channel A X 21 Bandwidth kbit s 64 64 or 128 Sample Rate 16k 32k 48k 64k Baud Rate range Async Mod...

Page 6: ...arrays This port carries an aggregate of three bi directional data channels one X 21 channel and two V 24 channels Standard X 21 Port Pin out when in DTE configuration D15M on chassis Circuit Pin A P...

Page 7: ...erived from within the unit in this case the Clock Source must be configured to Master In both cases the timing signal is output on pins 6 and 13 Optional X 21 Port Pin out when in DCE configuration D...

Page 8: ...ection and port connections are additionally protected by Tranzorb type arrays Aggregate Concatenation Aggregate Concatenation is the interconnection at aggregate level of two co located SMX3 21 units...

Page 9: ...on to a co located SMX3 21 requires a five twisted pair cross over cable with overall shield eg RS 111 8988 Maximum recommended length 10m check Utility standards Aggregate Concatenation Cable D15M D1...

Page 10: ...Transceivers are specified to 15kV IEC1000 4 2 air discharge ESD protection and port connections are additionally protected by Tranzorb type arrays Data received at the Channel A port is always termin...

Page 11: ...switches provide configure options for each port see section 10 V 24 Port Sharing There are two methods by which multiple V 24 ports can be assigned to an aggregate channel Channels ports B and C wit...

Page 12: ...sm DTR is ignored and can be left unconnected the sub multiplexer assumes a continuous ON state DSR is ON when the Aggregate is working an in synchronism RI is unconnected or permanently OFF When RTS...

Page 13: ...hes DIP Switch Locations Dip Switch functions SW1 SW2 SW3 SW4 SW5 SW6 Channel A X 21 Data configuration Channel B V 24 Data configuration Channel C V 24 Data configuration Not used Aggregate Concatena...

Page 14: ...to Off When set to On data transmitted into of the MUX TxD is looped back to its RxD output Channel A requires the clock to be present as this is a DCE port the clock is sourced from the MUX provided...

Page 15: ...lso be used for applications where asynchronous character formats are not specifically supported The baud rate settings are ignored See section 5 Async 8 bit is selected for 7 data bits plus 1 parity...

Page 16: ...here network timing is unavailable The timing signal X is output on pins 6 and 13 Sa and Sb Timing must be selected Enabled as Concat ie DTE Timing X This is the normal setting for the Concatenation P...

Page 17: ...the concatenation port from the co located unit When used in conjunction with the modes Enabled as DCE or Enabled as DTE Signal Timing X the timing signal received from the concatenation port will be...

Page 18: ...able Note For units connected in a concatenated network data on aggregate channels 2 and 3 is broadcast to all configured V 24 ports regardless of whether there is equipment connected to those ports I...

Page 19: ...ther Main Earth 13 Alarms Two alarm relays are incorporated energised when healthy Each relay provides a single changeover contact presented on a plug in terminal strip see equipment layout For a cont...

Page 20: ...ck signal is provided by the X 21 links V 24 channels configured in Transparent mode DIP Switch Settings for both units 8 7 6 5 4 3 2 1 SW1 0 0 0 0 0 0 0 1 SW2 0 0 0 0 0 1 0 0 SW3 0 0 0 0 0 1 0 1 SW4...

Page 21: ...igured in Transparent mode DIP Switch Settings for A1 C1 8 7 6 5 4 3 2 1 SW1 0 0 0 0 0 0 0 1 SW2 0 0 0 0 0 1 0 0 SW3 0 0 0 0 0 1 0 1 SW4 Not used SW5 0 0 0 0 0 0 0 1 SW6 0 1 0 0 0 0 0 0 DIP Switch Set...

Page 22: ...able Location Reference DIP Switch Settings 8 7 6 5 4 3 2 1 SW1 SW2 SW3 SW4 SW5 SW6 2009 RFL Communications plc Connect 17 Avon Way Langley park CHIPPENHAM Wilts SN15 1GG www rflcomms co uk Installati...

Reviews: