RX Family
Hardware Design Guide
R01AN1411EJ0110 Rev.1.10
Page 9 of 32
Oct.26.21
2.2 VCL Pin
Connect the VCL pin to GND via a capacitor with a rated capacitance matching that specified in the user’s
manual of the device used. The wiring length between the VCL pin and the capacitor should be 8 mm or less
(4 mm or less if possible).
Note that GND wiring patterns vary depending on the number of board layers. Section 2.2.1 describes two-
layer boards, and section 2.2.2 describes boards with four or more layers.
Board design hint
If the wiring length between the VCL pin and capacitor is longer than 8 mm, the parasitic resistance
increases, decreasing the effectiveness of the capacitor and possibly causing noise from the VCC
pin. When the wiring length between the VCL pin and capacitor is longer than 8 mm, the wiring
pattern should be designed so that the parasitic resistance is less than 1 Ω. Figure 2.4 shows a
formula for calculating the parasitic resistance.
w
l
t
Wiring on printed circuit board
Parasitic resistance = R + 2
p
fL (
Ω
) < 1 (
Ω
)
R = l
σ
wt
/
(
Ω
)
f = 20 (MHz) (internal fluctuation in MCU when power is supplied)
L = 0.2l ln
[
2l (w+t)
/
{
}
]
+0.5 (µH)
ω
L = 2
p
fL(
Ω
)
Figure 2.4 Formula for Calculating Parasitic Resistance
In the following example, the formula shown in Figure 2.4 is used to calculate the parasitic resistance.
Example:
Wiring length (l): 0.008 m (8 mm)
Wiring width (w): 0.00025 m (0.25 mm)
Wiring thickness (t): 0.000035 m (0.035 mm)
Resistivity of copper (
ρ = 1 / σ): 0.0000000169 Ω
•
m
Parasitic resistance = R + 2
p
fL
= (l /
σwt) + 2
p
20
(0.2
l (loge (2
l / (w + t)) +0.5))
= 0.01545 + 2
3.1416
20
0.00724
0.9253 (
Ω)
