CHAPTER 14 SERIAL ARRAY UNIT
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14.3
Registers Controlling Serial Array Unit
Serial array unit is controlled by the following registers.
Caution
In this chapter, read all the registers of the channels that are not available as the reserved
registers.
• Peripheral enable register 0 (PER0)
• Serial clock select register m (SPSm)
• Serial mode register mn (SMRmn)
• Serial communication operation setting register mn (SCRmn)
• Serial data register mn (SDRmn)
• Serial flag clear trigger register mn (SIRmn)
• Serial status register mn (SSRmn)
• Serial channel start register m (SSm)
• Serial channel stop register m (STm)
• Serial channel enable status register m (SEm)
• Serial output enable register m (SOEm)
• Serial output level register m (SOLm)
• Serial output register m (SOm)
• Noise filter enable register 0 (NFEN0)
• Port input mode registers 0, 14 (PIM0, PIM14)
• Port output mode registers 0, 14 (POM0, POM14)
• Port mode registers 0, 1, 7, 14 (PM0, PM1, PM7, PM14)
• Port registers 0, 1, 7, 14 (P0, P1, P7, P14)
Summary of Contents for RL78/G1H
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