SH7211 Group
Data Transfer between On-chip RAM Areas with DMAC (Cycle-Stealing Mode)
REJ06B0732-0100/Rev.1.00
March 2008
Page 2 of 13
1. Introduction
1.1 Specification
•
DMAC channel 0 is used.
•
Auto-request mode is used as the interrupt source for activating DMA transfer.
•
Cycle-stealing mode is used as the bus mode.
1.2 Used
Module
•
Direct memory access controller (DMAC channel 0)
1.3 Applicable
Conditions
•
Microcontroller: SH7211
•
Operating Frequency:
Internal clock
160 MHz
Bus clock
40 MHz
Peripheral clock
40 MHz
•
C Compiler:
SuperH RISC engine family C/C++ compiler package Ver.9.01,
from Renesas Technology
