Renesas R0E436640CPE00, User Manual

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R0E436640CPE00 User’s Manual 3. Usage (Emulator Debugger)
REJ10J0918-0300 Rev.3.00 February 15, 2007 Page 54 of 102
3) Example Data Settings
The R0E436640CPE00 requires that events be set according to the bus operation.
Make sure the even-address data is set on the upper side and the odd-address data is set on the lower side.
Setting events for wordwise accesses to the 8-bit bus area of the internal I/O
MOV.W R0,H’FFDE (R0=H’0001)
Write access to H’FFDE is performed in two separate writes.
Make sure that events are set for the even and odd addresses separately.
Even-address high-order data effective
Odd-address low-order data effective
Setting events for wordwise accesses to the 16-bit bus areas of the ROM, RAM
and internal I/O
MOV.W R2,H’E002 (R2=H’AA55)
High-order and low-order data effective
Setting events for bytewise accesses to the ROM, RAM and internal I/O
MOV.B R0L,H’E000 (R0L=H’04)
MOV.B R0H,H’E001 (R0H=H’08)
Even-address high-order data effective
Odd-address low-order data effective
Setting a break event
A1 A2
Address 1 :00FFDE Address 1 :00FFDF
Data 1 :0000 Data 1 :0001
MASK :FF00 MASK :00FF
Access :WRITE Access :WRITE
Set the combinatorial events to AND.
Setting a break event
A1
Address 1 :00E002
Data 1 :AA55
MASK :FFFF
Access :WRITE
Setting a break event
A1
Address 1 :00E000
Data 1 :0400
MASK :FF00
Access :WRITE
Setting a break event
A1
Address 1 :00E001
Data 1 :0008
MASK :00FF
Access :WRITE