Renesas M3A-HS85, User Manual

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Overview
1.7 M3A-HS85 Memory Mapping
Rev.1.04 2008.07.10
1-8
REJ10J1564-0104
1
1.7 M3A-HS85 Memory Mapping
Figure 1.7.1, Figure 1.7.2, and Figure 1.7.3 show the memory mapping examples of SH7285 in the M3A-HS85.
Logical space of the SH7285
MCU mode 3
(Single Chip Mode)
Reserved
On-chip flash memory
writing/verify space
Peripheral I/O
H'0000 0000
H'000C 0000
H'FFF8 0000
H'FFF8 8000
M3A-HS85 Memory Mapping
Reserved
On-chip ROM(768KB)
H'000B FFFF
H'FFF7 FFFF
H'FFF8 7FFF
H'0000 0000
H'000C 0000
H'000B FFFF
Reserved
SDRAM mode setting
Reserved
On-chip RAM(32KB)
H'8020 0000
H'8030 0000
H'801F FFFF
H'802F FFFF
H'FFFC 0000
H'FFFD 0000
H'FFFB FFFF
H'FFFC FFFF
H'FFFE 0000
H'FFFD FFFF
H'FFFF FFFF
Reserved
On-chip flash memory
writing/verify space
Peripheral I/O
H'FFF8 0000
H'FFF8 8000
Reserved
On-chip ROM(768KB)
H'FFF7 FFFF
H'FFF8 7FFF
Reserved
SDRAM mode setting
Reserved
On-chip RAM(32KB)
H'FFFC 0000
H'FFFD 0000
H'FFFB FFFF
H'FFFC FFFF
H'FFFE 0000
H'FFFD FFFF
H'FFFF FFFF
H'8020 0000
H'8030 0000
H'801F FFFF
H'802F FFFF
Figure 1.7.1 Memory Mapping Example of SH7285 (MCU mode 3)