7. I
2
C Interface > Boot Load Sequence
172
Tsi576 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
7.8.6
Chaining
The boot loader provides for booting from multiple EEPROMs, or from multiple sections within a
single EEPROM (or any combination of both). This process is called
chaining
. Chaining is invoked
during the boot load sequence when three conditions occur together:
•
All the registers indicated by the register count are loaded
•
The final register loaded was the
•
The value loaded into the I2C_BOOT_CNTRL register had the CHAIN bit set
If these conditions are met, then the boot load sequence continues using the updated information in the
I2C_BOOT_CNTRL register. This allows all aspects of the boot load to be changed – the device
address, the peripheral address, and so forth. When a chain occurs, the boot load sequence addresses
the new device and reads a new register count from the peripheral address. This address could be
non-zero, so on a chain it is possible to start loading from other than address 0 in an EEPROM.
On a chain, it is important to set the peripheral address size (PSIZE), boot address increment (BINC)
and page mode (PAGE_MODE) fields so they are valid for the new EEPROM; otherwise, the boot load
process may be corrupted (for information about these bits, see
).
It may also be necessary to use the BOOT_UNLK field to change the lower 2 bits of the EEPROM
address. By default, the BOOT_UNLK field is not set, so if the BOOT_ADDR field is changed, the
lower 2 bits remain at their previous value. This way the power-up reset value is not inadvertently lost.
If as part of the chaining process it is necessary to change those bits (such as if the boot load is being
switched to a common EEPROM), then a two-step process is needed. The I2C_BOOT_CNTRL
register should be written once with the BOOT_UNLK field set to 1, then written a second time with
the correct information. The lower 2 bits of the BOOT_ADDR field are only allowed to change if the
BOOT_UNLK field was a 1 before the register load.
7.8.7
EEPROM Data Format
shows the EEPROM data format for boot loading. The first 8 bytes of the EEPROM contain
the number of registers to be loaded during the boot procedure. This count is the 16-bit value in
EEPROM location 0 (MSB) and location 1 (LSB). The I
2
C Interface is limited to 255 register loads in
1-byte address mode, and limited to 8 KB-1 register loads in 2-byte address mode. The remaining 6
bytes (memory locations 2 through 7) must be set to 0xFF or the register count validity check will fail
and the boot load will be aborted.
When 1-byte address mode is selected, any number of registers greater than 255 (0x00FF)
aborts the boot load from the EEPROM.
When 2-byte address mode is selected, any number of registers greater than 8191 (8 KB-1 =
0x1FFF) aborts the boot load from the EEPROM.
