Section 5 Restriction on the Interface
Rev. 2.00 Sep. 08, 2008 Page 17 of 20
REJ10J1394-0200
Section 5 Restriction on the Interface
The following restriction applies to the interface when pins PF7, PF6, and PF5 of the MCU are
selected as CS-output pins by the emulator, to which the user system interface board is connected.
Jumper pins (SW1 to SW3) are used to switch the functions of pins PF7, PF6, and PF5 between
port and CS-output functions. While these pins are in use as CS-output pins, the functions of PF7,
PF6, and PF5 are disabled.
1
3
SW1
PF7
MCU
PF7
CS7
PF6
CS6
PF5
CS5
User system
PF6
PF5
1
3
SW2
1
3
SW3
Figure 12 Interface Circuit
Summary of Contents for H8SX/1651
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