Renesas H8/300 Series, Programming Manual

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ANDC (AND Control register) ANDC
<Description>
This instruction ANDs the condition code register (CCR) with immediate data and places the
result in the condition code register. Bits 6 and 4 are ANDed as well as the flag bits.
No interrupt requests are accepted immediately after this instruction. All interrupts, including
the nonmaskable interrupt (NMI), are deferred until after the next instruction.
<Instruction Formats>
Immediate ANDC #xx:8, CCR 0 6 IMM 2
Addressing
mode
Mnem. Operands
1st byte
Instruction code
No. of
states
2nd byte 3rd byte 4th byte
<Operation>
CCR
∧
#IMM
→
CCR
<Assembly-Language Format>
ANDC
#xx:8, CCR
<Examples>
ANDC #H'7F, CCR
<Operand Size>
Byte
<Condition Code>
I: ANDed with bit 7 of the immediate data.
H: ANDed with bit 5 of the immediate data.
N: ANDed with bit 3 of the immediate data.
Z: ANDed with bit 2 of the immediate data.
V: ANDed with bit 1 of the immediate data.
C: ANDed with bit 0 of the immediate data.
I H N Z V C
↕ ↕ ↕ ↕ ↕ ↕ ↕ ↕
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