Renesas CE2000-H8S Series, User Manual

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4.4 Interrupts
During emulation, the user can interrupt the H8S. If an interrupt occurs while the emulator is in the
break mode, the interrupt is not processed. However, if an edge-sensitive interrupt occurs while the
emulator is in the break mode, the emulator latches the interrupt and executes the interrupt processing
routine when the GO command is instructed again.
Interrupt request is masked during single step.
4.5 Control Input Signals (RES, NMI, STBY)
The H8S input signals (RES, NMI and STBY) are controlled by the emulator. These signals can be
masked by the HEW. In default, the STBY signal is masked. The RES signal is valid only when emulator
enters run mode.
4.6 Watch Dog Timer (WDT)
The WDT operates during run mode emulation, and does not operate when the emulator is in the break
mode. The timer is disabled at a break and enabled when emulation resumes.
4.7 16-bit Timer Pulse Unit (TPU) and 8-bit Timer
The TPU and the 8-bit timer operate during the break mode as well as the user mode i.e., the timer pins
are valid even when the user program has stopped. The user can rewrite the timer registers with the
I/O
window or Memory window.
4.8 Serial Communications Interface (SCI)
The serial communications interface signals are connected to the user system directly from the H8S MCU
in the emulator. Therefore, the interface is valid both in the break and run mode. For example, when
writing data to the TDR (transmit data register) in the
I/O or Memory Window, after the serial
communications interface output has been initialized, data is output to the TXD line.
4.9 Programmable Pulse Generator (PPG)
The PPG operates during break and run modes.
4.10 DMA Controller (DMAC)
The DMAC operates during emulation execution and in the break mode. When a transfer request occurs,
the emulator carries out DMA transfer.
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