B-1
Block Diagram
A
PPENDIX
B
Block Diagram
Figure B.1 illustrates a block diagram showing circuit organization of the PSC5000
Serial Absolute Encoder Input Card II (S-ABS II Card) briefly.
Figure B.1 - Block Diagram of the S-ABS II Card
DC/DC
Converter
ISOL5V
5V
40-pin Input
Connector
Protection
Circuit
Protection
Circuit
Protection
Circuit
Con
v
ersion from
5
V Diff
erential Signal
to
5 V TTL
Signal
Isolation b
y
Photo Couplers
Gate
Array
1st
Data
2nd
Data
Gate
Array
1st
Data
2nd
Data
Gate
Array
1st
Data
2nd
Data
Effective
Data
Effective
Data
Effective
Data
8 MHz
Oscillator
Latch
Controller
Error Status
Preparing Circuit
Status Display
by LED
Register 0
Address
Decoder
Arbitration
Register 7
Register 6
Register 4
Register 2
PSC5000 Bus
Data
(16 bits)
Address
(19 bits)
XACKL
BERRL
Bus Clock
12 MHz
Total
15 LEDs
Latch controller, internal register for data preparation,
error status preparing circuit, and registers 0 to 7
exist within PLD (84 pins).
Channel 1
Serial
Channel 2
Serial
Channel 3
Serial
Summary of Contents for S-ABS II Card
Page 4: ...II PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 6: ...IV PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 8: ...VI PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 18: ...3 6 PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 26: ...5 2 PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 30: ...A 2 PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 32: ...B 2 PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 44: ...E 6 PSC5000 Serial Absolute Encoder Input Card II S D4024...
Page 51: ......