RDS PIRA32 Manual Download Page 7

PIRA32 Microcontroller 

© 2016 Pira.cz 

m32.pdf - page 7 

DESIGN NOTES 

 

 

3.1 

Device reset 

 
A reset is generated by holding the /RESET pin low. 
The device has a noise filter in the reset path which 
detects and ignores small pulses. 
 
A reset pulse is generated on-chip whenever V

DD

 

rises above a certain threshold. This allows the 
device to start in the initialized state when V

DD

 is 

adequate for operation. 
 
To take advantage of this feature, tie the /RESET 
pin through a resistor (1k to 10k) to V

DD

. This will 

eliminate external RC components usually needed 
to create a reset delay. 
 

 

Figure 4.1

 

– Device reset. 

 
When the device starts normal operation (i.e., exits 
the reset condition), device operating parameters 
(voltage, temperature, etc.) must be met to ensure 
operation. If these conditions are not met, the 
device must be held in reset until the operating 
conditions are met. 
 
 

3.2 

Crystal oscillator 

 
The oscillator circuit should be placed on the same 
side of the board as the device. The load capacitors 
should be placed next to the oscillator itself. 
 
The load capacitor value depends on the crystal 
characteristics. Optimal value ensures the F

OSC

 to 

lie in the tolerance range given in section Electrical 
characteristics. A good starting value is 22 pF for 
the load capacitors. 
 

 

Figure 4.2

 

– Crystal oscillator. 

 
Recommended crystal type is 
Auris 

Q- 4,332000M-HC49US-F-30-30-D-16

 

or equivalent. 

3.3 

Power supply 

 
The power supply must be bypassed close to the 
device with a 100 nF ceramic capacitor. The output 
RDS level varies proportionally to the supply 
voltage. 
 
 

3.4 

Internal PLL 

 
The PIRA32 Microcontroller includes an internal 
phase locked loop, which synchronises the RDS 
subcarrier with 19 kHz pilot tone in case of stereo 
broadcast. Parameters of the PLL are controlled by 
software. 
 
Pilot tone is tied to the PILOT input pin and must 
comply with TTL levels. 
 
The PLL is active if the /SYNC pin is driven low. 
This configuration makes easy to connect commonly 
available clock recovery circuits (LM567) if the pilot 
tone needs to be filtered from MPX signal. 
 
The PLL should be disabled in case of mono 
broadcast by driving the /SYNC pin high or by the 
command 

EXTSYNC

 
 

3.5 

External TA switch 

 
The external TA switch can set the Traffic 
Announcement flag to 1. The TA flag is set to 1 if 
the TA input is driven low. This can be done using 
simple mechanical switch or any logic circuit. 
 
Where the external TA switch feature is not 
required, the TA pin must be tied to V

DD

 through a 

resistor. 
 
 

3.6 

RS-232 interface 

 
The RS-232 interface is used for the device 
configuration and data transfers. The RXD and TXD 
pin levels are compatible with TTL. For connection 
to external equipment an inverter and level 
converter is required (for example MAX232). 
 
The serial data format is given in the RDS Encoder 
Technical manual (available online). 

 

 

Summary of Contents for PIRA32

Page 1: ...2106 Continuous RDS transmission during all operations Firmware update capability Communication bus RS 232 bidirectional Baud rate 1200 to 19200 Bd Packages available 28 Pin PDIP 28 Pin SOIC TYPICAL APPLICATIONS FM broadcast RDS encoders with single communication port RDS testing research and development Important Note This datasheet is not intended to be a complete PIRA32 system designer s refere...

Page 2: ...rnal TA switch 7 3 6 RS 232 interface 7 3 7 Digital to Analog converter 8 3 8 Output low pass filter 9 3 9 Expansion I 2 C bus 9 3 10 Operation without EEPROM on I 2 C bus 9 4 CONNECTION DIAGRAMS 10 4 1 Basic connection diagram 10 4 2 Reference connection diagram 11 4 2 1 Setting up 11 4 2 2 I O connectors and control items 11 4 2 3 Schematic diagram 12 4 2 4 Part list 13 5 PACKAGE DETAILS 14 5 1 ...

Page 3: ...r If the pilot sync function is not required mono transmission connect this pin to VDD through a resistor so internal clock reference will be used PILOT Pilot tone input The pilot tone must comply with TTL levels If pilot tone is not available or does not meet the specifications required the SYNC pin should be driven high PROGRAM Program select Selects between two different RDS data sets program 1...

Page 4: ...connected SCL I 2 C serial clock output Open drain terminal external 2k pull up resistor is required SDA I 2 C serial data input output Open drain terminal external 2k pull up resistor is required TXD Serial port transmit data Serial RS 232 port transmit data output software selectable 1200 to 19200 bps Logical high idle This pin is required for proper software configuration of the device RXD Seri...

Page 5: ...put data buffer 48 R D S group sequencer O perational m em ory R AM Internal R TC IIC controller C om m and interpreter R X buffer 48 bytes Pow er supply R eset O SC Internal reference R D S on off PILO T TA PR O G R AM D A0 D A 7 V D D V SS SYN C R ESET O SC IN O SC O U T LED 1 SC L SD A R XD TXD LED 2 C om m and buffer 280 bytes P 32 M C U Scheduler ...

Page 6: ... 0 3 V to VDD 0 3 V Maximum current sourced by any output pin 25 mA Maximum current sunk by any output pin 25 mA Stresses above those listed under Maximum Ratings may cause permanent damage to the device Symbol Parameter Min Typ Max Unit Conditions VDD Supply voltage 4 2 5 5 V FOSC Oscillator Frequency 0 01 4 332 0 01 MHz FS D A Converter sampling rate 361 kHz BPLL PLL capture range 8 Hz Stereo br...

Page 7: ...ed crystal type is Auris Q 4 332000M HC49US F 30 30 D 16 or equivalent 3 3 Power supply The power supply must be bypassed close to the device with a 100 nF ceramic capacitor The output RDS level varies proportionally to the supply voltage 3 4 Internal PLL The PIRA32 Microcontroller includes an internal phase locked loop which synchronises the RDS subcarrier with 19 kHz pilot tone in case of stereo...

Page 8: ... output signal using low cost resistor network Figure 4 3 shows accurate 8 bit DAC using R 2R resistor network It s a binary weighted DAC that creates each value with a repeating structure of 2 resistor values R and R times two This is an optimal DAC for this device The resistor value tolerance must not exceed 2 Figure 4 3 8 bit D A converter R 2R network Figure 4 4 Output RDS signal on oscillosco...

Page 9: ...its functions and features All of these devices are optional i e the final design is highly customizable The devices are recognized automatically on power up or device reset The I 2 C devices supported are listed in following table Device name Manufacturer Description 24LC256 Microchip Serial EEPROM Non volatile memory for storing RDS and configuration data Recommended for proper function PCF8563 ...

Page 10: ...witch Driving this pin low will activate the RDS TA flag Optional PILOT Pilot input 19 kHz TTL from stereo encoder or pilot recovery circuit Optional RS232 RS232 interface in TTL levels for connection to a PC or any data provider through a level converter USB adapter or Ethernet adapter PLL_SYNC Synchronization source selection 0 External pilot 1 Internal clock IIC Expansion I 2 C bus RDS_OUT Fina...

Page 11: ...t 4 2 1 Setting up After assembly the setting up can be made in a few steps Without any input signal connected adjust 19 kHz 100 Hz on pin 3 of the IC2 Initialize the EEPROM memory in the Windows control software select RDS Encoder Special Initialize or follow the Technical manual 4 2 2 I O connectors and control items J5 Output J6 Optional pilot MPX input JP2 Loopthrough mode enabling jumper R27 ...

Page 12: ...PIRA32 Microcontroller m32 pdf page 12 2016 Pira cz 4 2 3 Schematic diagram ...

Page 13: ...10 100u min 25V electrolytic C6 C11 C12 C18 C19 C20 C24 C26 C32 100n ceramic C7 C8 10u min 35V electrolytic C9 C33 100u min 16V electrolytic C13 C14 C30 22p ceramic C15 C16 C25 4n7 foil C17 22n 5 foil C21 3n3 foil C22 220n foil C23 C29 1n ceramic C27 47n 5 foil C28 330p ceramic C31 4u7 foil BT1 CR2032 battery in vertical socket POWER DC power connector R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R1...

Page 14: ... A1 015 Shoulder to Shoulder Width E 300 310 325 Molded Package Width E1 275 285 295 Overall Length D 1 345 1 365 1 385 Tip to Seating Plane L 125 130 135 Lead Thickness c 008 012 015 Upper Lead Width B1 040 053 065 Lower Lead Width B 016 019 022 Overall Row Spacing eB 320 350 430 Mold Draft Angle Top 5 10 15 Mold Draft Angle Bottom 5 10 15 Notes Significant Characteristic Dimension D and E1 do no...

Page 15: ... 0 20 0 30 Overall Width E 10 01 10 34 10 67 Molded Package Width E1 7 32 7 49 7 59 Overall Length D 17 65 17 87 18 08 Chamfer Distance h 0 25 0 50 0 74 Foot Length L 0 41 0 84 1 27 Foot Angle Top 0 4 8 Lead Thickness c 0 23 0 28 0 33 Lead Width B 0 36 0 42 0 51 Mold Draft Angle Top 0 12 15 Mold Draft Angle Bottom 0 12 15 Notes Significant Characteristic Dimensions D and E1 do not include mold fla...

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