RCAT RCAT-1A Revision A3 System Manual Download Page 37

Page: 37 / 46

RCAT-1A Rev A3 Designer’s manual

Serious Power for the Serious Designer

Configuration 9

USART

Interface

Access

Jumper(s) and port configs

USART0

RS422/485

J16

JP25(B-C), JP24(B-C)

USART1

Ethernet

J10

JP6 Removed, JP7 Removed,
JP15 Removed, JP17 Removed,
JP20 Installed, PH7 = 0, PH6 = 1, PG5 = 0

USART2

Logic/Full Duplex

JP10(B-C), JP11(B-C), JP8(A-B), JP9(A-B)

JP22 Removed

USART3

Logic

JP12(A-B), JP13(A-B), JP21 Removed

Configuration 10

USART

Interface

Access

Jumper(s) and port configs

USART0

USB

JP14(A-B), JP25(A-B), JP16(A-B), JP24(A-B)

USART1

Ethernet

J10

JP6 Removed, JP7 Removed,
JP15 Removed, JP17 Removed,
JP20 Installed, PH7 = 0, PH6 = 1, PG5 = 0

USART2

Logic/Full Duplex

JP10(B-C), JP11(B-C), JP8(A-B), JP9(A-B)

JP22 Removed

USART3

Logic

JP12(A-B), JP13(A-B), JP21 Removed

Configuration 11

USART

Interface

Access

Jumper(s) and port configs

USART0

RS232

J11

JP14(B-C), JP25(A-B), JP16(B-C), JP24(A-B)

USART1

Ethernet

J10

JP6 Removed, JP7 Removed,
JP15 Removed, JP17 Removed,
JP20 Installed, PH7 = 0, PH6 = 1, PG5 = 0

USART2

Logic/Full Duplex

JP10(B-C), JP11(B-C), JP8(A-B), JP9(A-B)

JP22 Removed

USART3

Logic

JP12(A-B), JP13(A-B), JP21 Removed

Configuration 12

USART

Interface

Access

Jumper(s) and port configs

USART0

RS422/485

J16

JP25(B-C), JP24(B-C)

USART1

Ethernet

J10

JP6 Removed, JP7 Removed,
JP15 Removed, JP17 Removed,
JP20 Installed, PH7 = 0, PH6 = 1, PG5 = 0

USART2

Logic/Full Duplex

JP10(B-C), JP11(B-C), JP8(A-B), JP9(A-B)

JP22 Removed

USART3

Logic

JP12(A-B), JP13(A-B), JP21 Removed

Configuration 13

USART

Interface

Access

Jumper(s) and port configs

USART0

USB

JP14(A-B), JP25(A-B), JP16(A-B), JP24(A-B)

USART1

RS232

J12

JP15(B-C), JP17(B-C),

USART2

Logic/Half Duplex

J14

JP10(A-B), JP11(A-B), JP8(A-B), JP9(A-B)

JP22 Removed

USART3

Logic

JP12(A-B), JP13(A-B), JP21 Removed

Summary of Contents for RCAT-1A Revision A3

Page 1: ...gner s manual Serious Power for the Serious Designer RCAT Robotic System Control Board Serious Power for the Serious Designer System designer s manual Current Version RCAT 1A Revision A3 Robot Circuit...

Page 2: ...t other boards cannot 6 RCAT Board specifics 8 Power System 8 Schematic 8 Major Subsystems 10 Subsystems Detailed discussion 16 LED 16 Configuration 16 Control 16 Schematic 16 System Clock 17 Schemati...

Page 3: ...ut Output 28 USART 3 Port J8 30 Schematic 31 USART 1 Port J6 32 Schematic 32 Final comments about USART direct connections 34 Summary of direct access ports 34 USARTS and Serial Communications Interfa...

Page 4: ...a failure of the Robot Circuits LLC product would reasonably be expected to cause severe personal injury or death Safety critical applications include without limitation life support devices and syst...

Page 5: ...er this summary of the RCAT s features The RCAT is based on the Atmel ATMega 2560 Microcontroller which features o 256K of Program Flash ROM o 4K internal EEPROM o 8K internal SRAM o 4 High speed USAR...

Page 6: ...vailable at any one time the flexibility of the communications system allows you to interface with almost any serial device you can imagine The 14 interfaces include USART 0 USB 2 0 RS232 RS422 485 US...

Page 7: ...t drivers A 3 3Vdc Voltage regulator with access to the outside world In addition we provide COMPLETE FUNCTIONAL LOAD AND RUN demonstration software that you can use as a foundation for your applicati...

Page 8: ...r to the board The simplest and most preferable is shown in Figure 2 In this configuration a regulated 5Vdc is fed to J3 at pin 1 With JP3 installed this routes the 5Vdc immediately back out J3 on pin...

Page 9: ...to 400mA each and sonar ranging modules etc the current requirements increase accordingly The LM7805 is good for 1A which will with adequate heatsinking suffice for moderate current requirements but...

Page 10: ...hus are not brought out to external connection points Consider the extended RAM subsystem schematic Figure 4 We call such subsystems dedicated in that they use CPU ports fully dedicated to nothing oth...

Page 11: ...connector J4 provides direct access to ports PF4 PF5 PF6 PF7 and the CPU reset input However J4 is laid out for direct connection to an in circuit emulator for use by the CPU JTAG system Figure 7 If...

Page 12: ...les you to control the gates either from the CPU via software or externally by configuring ports PL0 and or PL1 as inputs and installing JP28 and or JP29 thus bringing connection to the gates out to J...

Page 13: ...additional pins J2 7 and J2 5 provide access to the TWI bus through bidirectional 3V level shifters for interfacing to 3V TWI devices 1M bit serial EEPROM Bussed J2 M24M01 RMN6TP serial EEPROM control...

Page 14: ...nd JP29 Loads are attached on JP26 and JP27 When the control jumper s are installed on off control can be achieved by either the CPU on ports PL0 or PL1 or by external control at J5 pins PL0_A and PL1...

Page 15: ...ocument for schematic and jumper configurations Power supply N A J3 JP2 JP3 JP4 The RCAT board comes configured for operation from a regulated 5Vdc 3Amp power supply It can also be configured for oper...

Page 16: ...understand the subsystem design and hopefully guide you to an understanding of how to use each LED The onboard LED is controlled by the CPU from ports PL6 and PL7 In order to use the LED both of these...

Page 17: ...g applied to numerous ports on the CPU When that occurs it is necessary to provide an externally generated clock to the CPU in order to recover There are plenty of how tos available online in the even...

Page 18: ...ng via your own code For most applications 64K is plenty of space but the extra page is there if you need it The sample solution provided with your board configures most of page 1 of this RAM as heap...

Page 19: ...s M24M01 R for details on how to properly use this device The example software solution provided with your RCAT board includes examples of how to read and write from to this device Please note that si...

Page 20: ...e Jumper JP23 determines the address at which the accelerometer is configured Position Write addr Read addr A B 0x3A 0x3B B C 0xA6 0xA7 Table 3 The accelerometer features two interrupt outputs that ar...

Page 21: ...Schematic Figure 16 Please consult the ATMega datasheet for details on the proper implementation of this input JTAG If you are using an in circuit emulator ICE like the Atmel ATATMEL ICE which we hig...

Page 22: ...rd without the addition of extra add on boards That s where the onboard mosfet driver subsystem comes into play Schematic Figure 18 Two mosfet chips are provided Each is a NX3008NBK 215 device from NX...

Page 23: ...ground causing ground noise Although the ground plane on the board will mitigate most of this it is still best if you connect the return line of your external power source to a ground point on the RCA...

Page 24: ...t from the CPU or from an external source Of course if you decide to utilize external control you will need to install a shunt on JP28 You should also make sure that port PL0 on the CPU is configured...

Page 25: ...n see the possibilities are very great and mostly just depend upon you needs Direct I O Access As noted previously there are many CPU ports that are broken out directly to various points on the RCAT c...

Page 26: ...r such devices are designed this way To the right of the J5 are labels GND Vcc SIG which identify the purpose of each row So row A connects to each relevant port on the CPU while rows B and C are comm...

Page 27: ...s Alternatively J1 presents several ports for direct access Here is the schematic Figure 26 As shown J1 gives you direct access to CPU ports PB1 PB2 and PB3 along with Vcc RST and GND access USART 0 T...

Page 28: ...e signal path To complete the path shorting shunts must be installed on jumper JP8 across pins A B and on jumper JP10 across pins B C IMPORTANT In this configuration you must ensure that jumper JP20 i...

Page 30: ...ted Data Direction Register DDR Then assuming the output of PH7 is high 1 this will configure translator U8 as an output from the CPU to J7 since a logic 1 at the DIR pin causes the translator to cond...

Page 31: ...ss to CPU port PJ1 from J8 pin 1 is obtained by installing a shunt on jumper JP12 across pins A B See the orange lines in the figure As in the previous section both of these signals can be level trans...

Page 32: ...With shunts installed on JP6 across pins A B and on JP15 across pins A B you gain direct connection from J6 pin 1 to CPU port PD3 Refer to the bold orange lines in Figure 32 With shunts installed on...

Page 33: ...er JP17 across pins A B Unlike the USARTS 2 and 3 the isolation jumper JP20 is handled differently than jumpers JP21 and JP22 are in the other cases Also please notice that U8 pin 7 connects directly...

Page 34: ...uts as needed that the level translators being used are enabled or disabled as desired OE and that the DIR pin on each translator is set or reset as appropriate Although this takes a bit of planning y...

Page 35: ...ces are shown jumpered for 5Vdc operation Configuration 1 USART Interface Access Jumper s and port configs USART0 USB J9 JP14 A B JP25 A B JP16 A B JP24 A B USART1 RS232 J12 JP15 B C JP17 B C JP20 Rem...

Page 36: ...e Access Jumper s and port configs USART0 RS422 485 J16 JP25 B C JP24 B C USART1 Logic J6 JP6 A B JP7 A B JP15 A B JP17 A B JP20 Removed USART2 Logic Full Duplex J7 JP10 B C JP11 B C JP8 A B JP9 A B J...

Page 37: ...B JP21 Removed Configuration 11 USART Interface Access Jumper s and port configs USART0 RS232 J11 JP14 B C JP25 A B JP16 B C JP24 A B USART1 Ethernet J10 JP6 Removed JP7 Removed JP15 Removed JP17 Remo...

Page 38: ...on 16 USART Interface Access Jumper s and port configs USART0 USB J9 JP14 A B JP25 A B JP16 A B JP24 A B USART1 Logic J6 JP6 A B JP7 A B JP15 A B JP17 A B JP20 Removed USART2 Logic Half Duplex J14 JP1...

Page 39: ...on 21 USART Interface Access Jumper s and port configs USART0 RS422 485 J16 JP25 B C JP24 B C USART1 Ethernet J10 JP6 Removed JP7 Removed JP15 Removed JP17 Removed JP20 Installed PH7 0 PH6 1 PG5 0 USA...

Page 40: ...moved JP17 Removed JP20 Installed PH7 0 PH6 1 PG5 0 USART2 Logic Half Duplex J14 JP10 A B JP11 A B JP8 A B JP9 A B JP22 Removed USART3 Logic J8 JP12 A B JP13 A B JP21 Removed RS422 485 Interface As sh...

Page 41: ...wireless transceiver like some products do However we felt as though this is a critical system that deserves to be done in a comprehensive enough manner that we couldn t justify trying to stuff someth...

Page 42: ...gure 36 below a 16 conductor ribbon cable connects nicely between J16 and the Netburner A Network able can then be connected to the Netburner and you are fully Ethernet enabled The Netburner SBL2E cos...

Page 43: ...t some recommendations Programming IDE interactive Development Environment Name Atmel Studio Manufacturer Atmel Languages C C Platform Windows Cost Free just must register an email address to download...

Page 44: ...oard These files have been annotated as such and renamed with an RCAT_ prefix to identify them Yes you SHOULD read the FreeRTOS documents and learn how to use the O S But the solution will load compil...

Page 45: ...ent 475mA with no external devices driven Processor Atmel ATMega 2560 Processor Speed 16MHz Crystal Board Length 5 60 inches Board Width 3 50 inches Max Height 0 925 inches without heatsinks I O ports...

Page 46: ...dimensional diagram Figure 37 the RCAT board is available as a SketchUp model on the Robot Circuits Website You can download the file here Figure 37 Schematic Diagram A complete schematic diagram of t...

Search results

Summary of Contents for RCAT-1A Revision A3

Reviews:

Brands by name

Popular brands

RCAT RCAT-1A Revision A3, System Manual

Search results

Summary of Contents for RCAT-1A Revision A3

Reviews:

Brands by name

Popular brands