UMTS/HSPA Module Series
WCDMA UGxx Audio Design Note
WCDMA_UGxx_Audio_Design_Note Confidential / Released 9 / 56
The voltage of VDD_EXT is 1.8V, please refer to
document [1]
for details.
In PCM audio format, the MSB of the channel included in the frame (PCM_SYNC) is clocked on the
second CLK rising edge after the PCM_SYNC pulse rising edge. The period of the PCM_SYNC signal
(frame) lasts for Data word bit +1 clock pulses.
The firmware of module has integrated the configuration on NAU8814/ALC5616/MAX9860 application
with I2C interface.
AT+QDAC
command can be used to configure the external codec chip linked with
PCM interface, and refer to
document [3]
for more details. Data bit is 32 bit and the sampling rate is 8
KHz. The following figure shows the timing of the application with ALC5616 codec.
PCM_CLK
PCM_SYNC
PCM_IN/OUT
32
1
0
31
Sampling freq. = 8 KHz
32-bit data word
BCLK = 264 KHz
33
MSB
Figure 1: PCM Master Mode Timing
V
OH
High-level output voltage
1.55
VDD_EXT
V
NOTE
Quectel
Confidential
