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3.23. USB_BOOT

USB_BOOT is an emergency download interface. You can force the module to enter emergency

download mode by pulling it up to LDO15A_1V8 when the module is turning on. This is an emergency

option when failures such as abnormal start-up or running occur. For firmware upgrade and debugging in

the future, reserve the following reference design.

Table 27: Pin Definition of USB_BOOT Interface

LDO15A_1V8

Module

USB_BOOT

10K

Figure 28: Reference Circuit Design for Emergency Download Interface

Pin Name

Pin No.

I/O

Description

Comment

USB_BOOT 46

Force the module into emergency

download mode

Force the module to enter

emergency download mode by

pulling this pin up to LDO15A_1V8

when the module is turning on.

Summary of Contents for SC206E Series

Page 1: ...SC206E Series Hardware Design Smart Module Series Version 1 0 Date 2022 04 22 Status Released...

Page 2: ...we employ commercially reasonable efforts to provide the best possible experience you hereby acknowledge and agree that this document and related services hereunder are provided to you on an as availa...

Page 3: ...To implement module functionality certain device data are uploaded to Quectel s or third party s servers including carriers chipset suppliers or customer designated servers Quectel strictly abiding by...

Page 4: ...ces may cause interference on sensitive medical equipment so please be aware of the restrictions on the use of wireless devices when in hospitals clinics or other healthcare facilities Cellular termin...

Page 5: ...206E_Series_Hardware_Design 4 115 About the Document Revision History Version Date Author Description 2021 11 25 Dorian MENG Waller GUO Creation of the document 1 0 2022 04 22 Dorian MENG Waller GUO F...

Page 6: ...er Supply 36 3 4 1 Power Supply Pins 36 3 4 2 Voltage Stability Requirements 36 3 4 3 Reference Design for Power Supply 37 3 5 Turn On Off 38 3 5 1 Turn On with PWRKEY 38 3 5 2 Turn Off 40 3 6 VRTC 40...

Page 7: ...na Interfaces 74 6 1 1 Operating Frequency 74 6 1 2 Reference Design 77 6 2 Wi Fi Bluetooth Antenna Interface 77 6 3 GNSS Antenna Interface 78 6 3 1 Reference Circuit Design for Passive GNSS Antenna 7...

Page 8: ...eries SC206E_Series_Hardware_Design 7 115 9 1 Storage Conditions 104 9 2 Manufacturing and Soldering 105 9 3 Packaging Specification 107 9 3 1 Plastic Reel 107 9 3 2 Packaging Process 108 10 Appendix...

Page 9: ...Pin Definition of Motor Drive Interface 53 Table 20 Pin Definition of LCM Interface 54 Table 21 Pin Definition of Flash Interface 56 Table 22 Pin Definition of Touch Panel Interface 57 Table 23 Pin D...

Page 10: ...umption 88 Table 51 SC206E EM Power Consumption 90 Table 52 SC206E NA Power Consumption 93 Table 53 SC206E CE RF Tx Power 94 Table 54 SC206E EM RF Tx Power 95 Table 55 SC206E NA RF Tx Power 96 Table 5...

Page 11: ...ure 21 Reference Circuit Design for the Touch Panel Interface 57 Figure 22 Reference Circuit Design for 3 Camera Applications 60 Figure 23 Reference Circuit Design for ECM Microphone Interface 64 Figu...

Page 12: ...Recommended Footprint Top View 102 Figure 43 Top and Bottom Views of the Module 103 Figure 44 Recommended Reflow Soldering Thermal Profile 105 Figure 45 Carrier Tape Dimension Drawing 107 Figure 46 P...

Page 13: ...this transmitter including any applicable source based timeaveraging duty factor antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2 1091 2 The EUT is a mobile device...

Page 14: ...n additional permanent label referring to the enclosed module Contains Transmitter Module FCC ID XMR2022SC206ENA or Contains FCC ID XMR2022SC206ENA must be used The host OEM user manual must also cont...

Page 15: ...modules within the host product The Innovation Science and Economic Development Canada certification label of a module shall be clearly visible at all times when installed in the host product otherwis...

Page 16: ...se specified when an asterisk is used after a function feature interface pin name AT command or argument it indicates that the function feature interface pin AT command or argument is under developmen...

Page 17: ...ltiple audio and video codecs Built in high performance AdrenoTM 702 graphics processing unit Provides multiple audio and video input output interfaces as well as abundant GPIO interfaces The module i...

Page 18: ...L1 Mode Frequency Bands LTE FDD B1 B2 B3 B4 B5 B7 B8 B20 B28 LTE TDD B38 B40 B41 WCDMA B1 B2 B4 B5 B8 GSM GSM850 EGSM900 DCS1800 PCS1900 Wi Fi 802 11a b g n ac 2402 2482 MHz 5180 5825 MHz Bluetooth 5...

Page 19: ...digital signage alarm panel security and industry PDA etc 2 2 Key Features The following table describes the detailed features of the module Table 5 Key Features 1575 42 1 023 MHz L1 1176 45 10 23 MH...

Page 20: ...A BC0 Class 3 24 dBm 1 3 dB for WCDMA bands Class 3 23 dBm 2 dB for LTE FDD bands Class 3 23 dBm 2 dB for LTE TDD bands LTE Features SC206E CE EM NA Supports 3GPP Rel 10 Cat 4 Supports 1 4 3 5 10 15 2...

Page 21: ...1 SC206E NA GPS GLONASS BDS Galileo QZSS SBAS NavIC L1 L5 SMS Text and PDU mode Point to point MO and MT SMS cell broadcast LCM Interface Supports one group of 4 lane MIPI DSI Supports up to HD 1680 7...

Page 22: ...plug U SIM Interfaces Two U SIM interfaces Supports USIM SIM cards 1 8 2 95 V Supports Dual SIM Dual Standby supported by default I2C Interfaces Four I2C interfaces Used for peripherals such as camera...

Page 23: ...d illustrates the major functional parts Power management Radio frequency Baseband LPDDR4X eMMC flash Peripheral interfaces Figure 1 Functional Diagram 2 4 EVB Kit To help you develop applications wit...

Page 24: ...owing interfaces and functions are described in detail in these subsequent chapters Power supply VRTC Power output Charging interface USB interface UART interfaces U SIM interfaces SD card interface G...

Page 25: ...N2_P 60 DSI_LN3_N 61 DSI_LN3_P 62 GND 63 CSI1_CLK_N 64 CSI1_CLK_P 65 CSI1_LN0_N 66 CSI1_LN0_P 67 CSI1_LN1_N 68 CSI1_LN1_P 69 GND 70 CSI1_LN3_N 71 CSI1_LN3_P 72 CSI1_LN2_N 73 CSI1_LN2_P 186 CBL_ PWR_N...

Page 26: ...Description DC Characteristics Comment VBAT 1 2 145 146 PIO Power supply for the module Vmin 3 5 V Vnom 3 8 V Vmax 4 4 V Provide sufficient current up to 3 A It is suggested to use a TVS for surge pro...

Page 27: ...tput current is 3 mA MIC1_P 4 AI Microphone input for channel 1 MIC1_M 5 AI Microphone input for channel 1 MIC2_P 6 AI Microphone input for headset MIC3_P 148 AI Microphone input for channel 3 MIC3_M...

Page 28: ...d compliant USB_SS1_RX_M 270 AI USB 3 1 channel 1 superspeed receive USB_SS1_TX_P 254 AO USB 3 1 channel 1 superspeed transmit USB_SS1_TX_M 253 AO USB 3 1 channel 1 superspeed transmit USB_SS2_RX_P 15...

Page 29: ...ported USIM2_DATA 20 DIO U SIM2 card data VILmax 0 2 USIM2_VDD VIHmin 0 7 USIM2_VDD VOLmax 0 4 V VOHmin 0 8 USIM2_VDD Cannot be multiplexed into a generic GPIO USIM2_CLK 19 DO U SIM2 card clock VOLmax...

Page 30: ...Name Pin No I O Description DC Characteristics Comment LCD_RST 49 DO LCD reset VOLmax 0 45 V VOHmin 1 35 V 1 8 V power domain LCD_TE 50 DI LCD tearing effect VILmax 0 63 V VIHmin 1 17 V DSI_CLK_N 52 A...

Page 31: ...N0_P 197 AI MIPI CSI0 lane 0 data CSI0_LN1_N 159 AI MIPI CSI0 lane 1 data CSI0_LN1_P 198 AI MIPI CSI0 lane 1 data CSI0_LN2_N 160 AI MIPI CSI0 lane 2 data CSI0_LN2_P 199 AI MIPI CSI0 lane 2 data CSI0_L...

Page 32: ...the module s charging status IImax 5 mA Keypad Interfaces Pin Name Pin No I O Description DC Characteristics Comment PWRKEY 114 DI Turn on off the module Pulled up to 1 1 V internally Active low VOL_U...

Page 33: ...DC Characteristics Comment ANT_MAIN 87 AIO Main antenna interface 50 impedance ANT_GNSS 121 AI GNSS antenna interface ANT_DRX 131 AI Diversity antenna interface ANT_WIFI BT 77 AIO Wi Fi Bluetooth ante...

Page 34: ...V IOmax 100 mA Connect it to the positive pole of the motor Other Interfaces Pin Name Pin No I O Description DC Characteristics Comment USB_BOOT 46 DI Force the module into emergency download mode For...

Page 35: ...g on GPIO_58 113 DIO General purpose input output GPIO_60 123 DIO General purpose input output GPIO_86 182 DIO General purpose input output GPIO_112 177 DIO General purpose input output GPIO_111 267 D...

Page 36: ...DIO General purpose input output PMU_GPIO03 124 DIO General purpose input output PMU_GPIO04 115 DIO General purpose input output PMU_GPIO08 127 DIO General purpose input output PMU_GPIO07 201 DIO Gene...

Page 37: ...drops below 3 4 V Voltage 3 8 V 3 A Input current Figure 3 Voltage Drop Sample To decrease voltage drop use a bypass capacitor of about 100 F with low ESR ESR 0 7 and reserve a multi layer ceramic chi...

Page 38: ...he input and output is not too big use an LDO when supplying power to the module If there is a big voltage difference between the input source and the desired output VBAT a buck converter is recommend...

Page 39: ...e PWRKEY pin low for at least 1 6 s The PWRKEY pin is pulled up to 1 1 V internally It is recommended to use an open collector driver to control PWRKEY A simple reference circuit is illustrated in the...

Page 40: ...DO17A_3V0 Active Note2 Software controlled Figure 8 Turn on Timing 1 When the module is turned on for the first time the turn on timing may be different from that shown above 2 Make sure that VBAT is...

Page 41: ...off Timing 3 6 VRTC The RTC Real Time Clock can be powered by an external power source through VRTC when the module is powered down and there is no power supplied to VBAT The external power source ca...

Page 42: ...lied to the battery When the battery voltage is charged up and is between 2 1 V and 3 4 V the charging current can be set to 400 mA maximally Constant current mode CC mode When the battery is increase...

Page 43: ...AT_P BAT_THERM VBAT 100 F NTC VBAT 33 pF 4 7 F ESD ESD 1 2 3 USB_VBUS Adapter or USB Module Battery BAT_M C1 C2 C3 D1 D2 C2 NM_1 nF C4 GND Figure 11 Reference Design for Battery Charging Circuit Mobil...

Page 44: ...eed differential channel USB_DP USB_DM and one USB 3 1 compliant superspeed differential channel USB_SS1_RX_P M USB_SS1_TX_P M and USB_SS2_RX_P M USB_SS2_TX_P M When Type C is plugged in with one side...

Page 45: ...ally the capacitance value should be less than 2 pF for USB 2 0 and less than 0 5 pF for USB 3 1 Do not route signal traces under crystals oscillators magnetic devices or RF signal traces Route the US...

Page 46: ...orts RTS and CTS hardware flow control UART4 debug UART two wire UART interface used for debugging by default UART1 two wire UART interface Table 12 Pin Definition of UART Interfaces Pin No Signal Len...

Page 47: ...ction between the module and a PC It is recommended to add a level translator and an RS 232 level translator chip between the module and the PC RTS_3 3V RXD_3 3V CTS_3 3V TXD_3 3V RTS_1 8V RXD_1 8V CT...

Page 48: ...I O Description Comment USIM1_VDD 26 PO U SIM1 card power supply Either 1 8 V or 2 95 V U SIM card is supported USIM1_DATA 25 DIO U SIM1 card data Cannot be multiplexed into a generic GPIO USIM1_CLK...

Page 49: ...y 22 pF VCC RST CLK IO VPP GND USIM_VDD 10K Module R1 R2 C1 22 pF 22 pF C2 C3 C4 D1 22R 22R R3 R4 R5 Figure 15 Reference Circuit for U SIM Interface with an 8 pin U SIM Card Connector If you do not ne...

Page 50: ...ot exceeding 10 pF Add 22 resistors in series between the module and U SIM card to suppress EMI such as spurious transmission Please note that the U SIM peripheral circuit should be close to the U SIM...

Page 51: ...he high output current it is recommended that the trace width should be at least 0 8 mm To ensure output current stability add a 4 7 F and a 33 pF capacitor in parallel near the SD card connector SD_C...

Page 52: ...put output GPIO_35 107 DIO General purpose input output GPIO_36 110 DIO General purpose input output GPIO_55 100 DIO General purpose input output GPIO_56 106 DIO General purpose input output GPIO_57 1...

Page 53: ...104 DIO General purpose input output GPIO_103 103 DIO General purpose input output GPIO_104 101 DIO General purpose input output GPIO_105 102 DIO General purpose input output GPIO_106 90 DIO General...

Page 54: ...8 V externally Can be used for other I2C devices CAM0_I2C_SCL 83 OD I2C clock of camera 0 Can only be used for camera I2C devices CAM0_I2C_SDA 84 OD I2C data of camera 0 CAM1_I2C_SCL 166 OD I2C clock...

Page 55: ...ace The module provides one LCM interface which is MIPI DSI standard compliant The interface supports high speed differential data transmission and supports HD display 1680 720 60 fps The pin definiti...

Page 56: ...IPI_TCP MIPI_TCN 29 28 30 3 4 5 6 3 4 5 6 3 4 5 6 3 4 5 6 DSI_LN1_N DSI_LN1_P DSI_LN0_N DSI_LN0_P 1 2 3 4 5 6 11 1 2 1 2 1 2 1 2 100 nF 4 7 F 1 F Module LCM FL1 FL2 FL3 FL4 FL5 EMI filter C3 C2 C1 NC...

Page 57: ...u can design the external backlight driving circuit for LCM according to actual requirements A reference circuit design is shown in the following figure in which the PWM pin is used to adjust the back...

Page 58: ...circuit for the TP interface is shown below TP_RST TP_I2C_SCL TP_I2C_SDA TP_INT 1 2 3 4 5 6 2 2K 2 2K LDO15A_1V8 4 7 F 100 nF Module RESET SCL SDA INT GND VDD TP R2 R1 C1 C2 D1 D2 D3 D4 D5 LDO17A_3V0...

Page 59: ...CLK_P 64 AI MIPI CSI1 clock CSI1_LN0_N 65 AI MIPI CSI1 lane 0 data CSI1_LN0_P 66 AI MIPI CSI1 lane 0 data CSI1_LN1_N 67 AI MIPI CSI1 lane 1 data CSI1_LN1_P 68 AI MIPI CSI1 lane 1 data CSI1_LN2_N 72 AI...

Page 60: ...era 0 1 8 V power domain CAM1_PWDN 82 DO Power down of camera 1 CAM2_PWDN 163 DO Power down of camera 2 CAM0_MCLK 74 DO Master clock of camera 0 CAM1_MCLK 75 DO Master clock of camera 1 CAM2_MCLK 165...

Page 61: ...N CSI1_CLK_P CSI1_CLK_N LDO15A_1V8 2 2K 2 2K camera1 connector 1 F 4 7 F 4 7 F 1 F 1 F 4 7 F CAM0_RST CAM2_PWDN CAM2_MCLK CAM1_I2C_SDA _ CAM1_I2C_SCL CAM2_RST camera2 connector AVDD DVDD DOVDD EMI EMI...

Page 62: ...e trace width among MIPI signal lines During impedance matching do not connect GND on different planes to ensure impedance consistency It is recommended to select a low capacitance TVS for ESD protect...

Page 63: ...3 0 3 CSI1_LN2_P 73 19 23 CSI1_LN3_N 70 18 93 0 11 CSI1_LN3_P 71 18 82 CSI0_CLK_N 157 20 94 0 21 CSI0_CLK_P 196 20 73 CSI0_LN0_N 158 18 74 0 34 CSI0_LN0_P 197 18 40 CSI0_LN1_N 159 17 18 0 19 CSI0_LN1_...

Page 64: ...e 1 output for microphone The rated output current is 3 mA MIC1_P 4 AI Microphone input for channel 1 MIC1_M 5 AI Microphone input for channel 1 MIC2_P 6 AI Microphone input for headset MIC3_P 148 AI...

Page 65: ...Reference Circuit Design for Microphone Interfaces MIC1_P ECM MIC Module MIC1_M C2 C3 MIC_BIAS1 R3 R1 C1 R4 2 2K 0R 0R MIC1_P ECM MIC Module MIC1_M C2 C3 MIC_BIAS1 R3 R1 R2 C1 R4 2 2K 0R 0R 0R 100 nF...

Page 66: ...33 pF 33 pF C2 C3 C1 R1 Module D1 D2 0R 0R Figure 25 Reference Circuit Design for Earpiece Interface 3 22 3 Reference Circuit Design for Headset Interface 20K ESD MIC2_P HPH_L HS_DET HPH_R HPH_GND 33...

Page 67: ...ld be heard during voice calls Please note that the resonant frequency point of a capacitor largely depends on its material and manufacturing technique Therefore you should consult the capacitor vendo...

Page 68: ...rmal start up or running occur For firmware upgrade and debugging in the future reserve the following reference design Table 27 Pin Definition of USB_BOOT Interface LDO15A_1V8 S1 Module USB_BOOT R1 10...

Page 69: ...dual band WLAN based on IEEE 802 11a b g n ac standard protocols The maximum data rate is up to 150 Mbps in 2 4 GHz bands and 433 Mbps in 5 GHz bands The features are as below Supports Wake on WLAN Wo...

Page 70: ...13 dBm 3 dB 802 11n HT20 MCS0 15 5 dBm 3 dB 802 11n HT20 MCS7 13 dBm 3 dB 802 11n HT40 MCS0 15 5 dBm 3 dB 802 11n HT40 MCS7 13 dBm 3 dB 802 11ac VHT20 MCS0 15 5 dBm 3 dB 802 11ac VHT20 MCS8 12 5 dBm 3...

Page 71: ...GFSK 8 DPSK 4 DQPSK modulation modes Maximally supports up to 7 wireless connections Maximally supports up to 3 5 piconets at the same time Support one SCO or eSCO connection 802 11n HT20 MCS7 71 dBm...

Page 72: ...ification RF PHY TS 4 0 0 December 15 2009 4 2 1 Bluetooth Performance The following table lists the Bluetooth transmitting and receiving performance of the module Table 31 Bluetooth Transmitting and...

Page 73: ...t GNSS and NavIC is supported by SC206E NA only Parameter Description Typ Unit Sensitivity Acquisition 147 dBm Reacquisition 159 dBm Tracking 159 dBm TTFF Cold start 31 2 s Warm start 24 7 s Hot start...

Page 74: ...al lines and RF components far away from high speed circuits switch mode power supplies power inductors the clock circuit of single chip microcomputers etc For applications with harsh electromagnetic...

Page 75: ...nna Interfaces Table 33 Pin Definition of Main Rx diversity Antenna Interfaces 6 1 1 Operating Frequency The operating frequencies of the modules are listed in the following tables Table 34 SC206E CE...

Page 76: ...0 2400 MHz LTE TDD B41 2535 2675 2535 2675 MHz 3GPP Bands Receive Transmit Unit GSM850 869 894 824 849 MHz EGSM900 925 960 880 915 MHz DCS1800 1805 1880 1710 1785 MHz PCS1900 1930 1990 1850 1910 MHz W...

Page 77: ...TDD B41 2496 2690 2496 2690 MHz 3GPP Bands Receive Transmit Unit LTE FDD B2 1930 1990 1850 1910 MHz LTE FDD B4 2110 2155 1710 1755 MHz LTE FDD B5 869 894 824 849 MHz LTE FDD B7 2620 2690 2500 2570 MH...

Page 78: ...he capacitors are not mounted by default and the resistors are 0 ANT_MAIN R1 0 C1 Module NM C2 NM Main Antenna ANT_DIV R2 0 C3 NM C4 NM Diversity Antenna Figure 29 Reference Circuit Design for Main an...

Page 79: ...C2 NM Wi Fi Bluetooth antenna Figure 30 Reference Circuit Design for Wi Fi Bluetooth Antenna 6 3 GNSS Antenna Interface The following tables show the pin definition and frequency specification of GNS...

Page 80: ...le ANT_GNSS NM C1 C2 C3 NM R1 0 Figure 31 Reference Circuit Design for Passive GNSS Antenna It is not recommended to add an external LNA when using a passive GNSS antenna Type Frequency Unit GPS L1 15...

Page 81: ...to use a passive antenna If active antennas are required it is strongly recommended to reserve a type attenuation and ensure that the total gain of the external GNSS RF path of the module is not grea...

Page 82: ...igure 33 Microstrip Design on a 2 layer PCB Figure 34 Coplanar Waveguide Design on a 2 layer PCB Figure 35 Coplanar Waveguide Design on a 4 layer PCB Layer 3 as Reference Ground Figure 36 Coplanar Wav...

Page 83: ...ould be complete Meanwhile adding some ground vias around RF traces and the reference ground could help to improve RF performance The distance between the ground vias and RF traces should be no less t...

Page 84: ...ed to use the U FL R SMT receptacle provided by Hirose Figure 37 Dimensions of the U FL R SMT Receptacle Unit mm Polarization Type Vertical Cable Insertion Loss 1 dB GNSS Frequency range L1 1559 1609...

Page 85: ...plugs listed in the following figure can be used to match U FL R SMT Figure 38 Mechanicals of U FL LP Plugs The following figure describes the space factor of mated connectors Figure 39 Space Factor...

Page 86: ...2 Power Supply Ratings Table 43 Power Supply Ratings Parameter Min Max Unit VBAT 0 5 6 V USB_VBUS 0 5 16 V Peak Current of VBAT 3 A Voltage on Digital Pins 0 3 2 16 V Parameter Description Conditions...

Page 87: ...x Unit VIH Input high voltage 1 17 2 1 V VIL Input low voltage 0 3 0 63 V VOH Output high voltage 1 35 1 8 V VOL Output low voltage 0 0 45 V Parameter Description Min Max Unit USIM_VDD Power supply 1...

Page 88: ...module meets 3GPP specifications VOH Output high voltage 2 36 2 95 V VOL Output low voltage 0 0 4 V Parameter Description Min Max Unit VIH Input high voltage 1 27 2 V VIL Input low voltage 0 3 0 58 V...

Page 89: ...SB disconnected DRX 7 4 21 mA Sleep state USB disconnected DRX 8 4 11 mA Sleep state USB disconnected DRX 9 3 87 mA CDMA supply current BC0 CH283 Slot Cycle Index 1 4 94 mA BC0 CH283 Slot Cycle Index...

Page 90: ...mA EGSM900 4UL 1DL PCL 5 613 mA DCS1800 1UL 4DL PCL 0 190 mA DCS1800 2UL 3DL PCL 0 297 mA DCS1800 3UL 2DL PCL 0 356 mA DCS1800 4UL 1DL PCL 0 439 mA EDGE data transmission EGSM900 1UL 4DL PCL 8 202 mA...

Page 91: ...TDD B41 max power 433 mA Description Conditions Typ Unit OFF state Power off 39 A GSM GPRS supply current Sleep state USB disconnected DRX 2 4 99 mA Sleep state USB disconnected DRX 5 4 24 mA Sleep s...

Page 92: ...PCL 19 83 mA EGSM900 PCL 5 291 mA EGSM900 PCL 12 138 mA EGSM900 PCL 19 83 mA DCS1800 PCL 0 181 mA DCS1800 PCL 7 133 mA DCS1800 PCL 15 81 mA PCS1900 PCL 0 190 mA PCS1900 PCL 7 135 mA PCS1900 PCL 15 81...

Page 93: ...435 mA EDGE data transmission GSM850 1UL 4DL PCL 8 194 mA GSM850 2UL 3DL PCL 8 318 mA GSM850 3UL 2DL PCL 8 430 mA GSM850 4UL 1DL PCL 8 550 mA EGSM900 1UL 4DL PCL 8 200 mA EGSM900 2UL 3DL PCL 8 325 mA...

Page 94: ...PA max power 600 mA LTE data transmission LTE FDD B1 max power 645 mA LTE FDD B2 max power 600 mA LTE FDD B3 max power 630 mA LTE FDD B4 max power 670 mA LTE FDD B5 max power 580 mA LTE FDD B7 max pow...

Page 95: ...USB disconnected DRX 6 5 07 mA Sleep state USB disconnected DRX 7 4 33 mA Sleep state USB disconnected DRX 8 4 04 mA LTE data transmission LTE FDD B2 max power 671 mA LTE FDD B4 max power 649 mA LTE F...

Page 96: ...dB 39 dBm LTE TDD B34 23 dBm 2 dB 39 dBm LTE TDD B38 23 dBm 2 dB 39 dBm LTE TDD B39 23 dBm 2 dB 39 dBm LTE TDD B40 23 dBm 2 dB 39 dBm LTE TDD B41 23 dBm 2 dB 39 dBm Frequency Bands Max RF Output Powe...

Page 97: ...dBm LTE TDD B40 23 dBm 2 dB 39 dBm LTE TDD B41 23 dBm 2 dB 39 dBm Frequency Bands Max RF Output Power Min RF Output Power LTE FDD B2 23 dBm 2 dB 39 dBm LTE FDD B4 23 dBm 2 dB 39 dBm LTE FDD B5 23 dBm...

Page 98: ...ty Frequency Bands Receiving Sensitivity dBm Typ 3GPP SIMO Primary Diversity SIMO EGSM900 109 5 102 4 DCS1800 109 102 4 WCDMA B1 110 5 112 TBD 106 7 WCDMA B8 111 112 TBD 103 7 EV DO CDMA BC0 108 5 104...

Page 99: ...B2 10 MHz 97 98 100 5 94 3 LTE FDD B3 10 MHz 98 5 98 101 5 93 3 LTE FDD B4 10 MHz 97 99 101 96 3 LTE FDD B5 10 MHz 99 99 2 102 94 3 LTE FDD B7 10 MHz 97 97 4 100 94 3 LTE FDD B8 10 MHz 99 99 5 102 93...

Page 100: ...g table shows the electrostatic discharge characteristics of the module Table 59 Electrostatic Discharge Characteristics Temperature 25 C Humidity 45 LTE FDD B7 10 MHz TBD TBD TBD 94 3 LTE FDD B12 10...

Page 101: ...hanical Information This chapter describes the mechanical dimensions of the module All dimensions are measured in millimeter mm and the dimensional tolerances are 0 2 mm unless otherwise specified 8 1...

Page 102: ...Smart Module Series SC206E_Series_Hardware_Design 101 115 Figure 41 Module Bottom Dimensions Bottom View The package warpage level of the module conforms to JEITA ED 7306 standard NOTE...

Page 103: ...s_Hardware_Design 102 115 8 2 Recommended Footprint Figure 42 Recommended Footprint Top View Keep at least 3 mm between the module and other components on the motherboard to improve soldering quality...

Page 104: ...03 115 8 3 Top and Bottom Views Figure 43 Top and Bottom Views of the Module Images above are for illustration purpose only and may differ from the actual module For authentic appearance and label ple...

Page 105: ...dry cabinet 4 The module should be pre baked to avoid blistering cracks and inner layer separation in PCB under the following circumstances The module is not stored in Recommended Storage Condition Vi...

Page 106: ...ste fill the stencil openings and then penetrate to the PCB Apply proper force on the squeegee to produce a clean stencil surface on a single pass To guarantee module soldering quality the thickness o...

Page 107: ...cleaning since it can damage crystals inside the module 3 Due to the complexity of the SMT process please contact Quectel Technical Supports in advance for any situation that you are not sure about or...

Page 108: ...Packaging Specification Dimension details are as follow Figure 45 Carrier Tape Dimension Drawing Table 61 Recommended Thermal Profile Parameters 9 3 1 Plastic Reel Figure 46 Plastic Reel Dimension Dra...

Page 109: ...and use the cover tape to cover them then wind the heat sealed carrier tape to the plastic reel and use the protective tape for protection One plastic reel can load 200 modules Place the packaged plas...

Page 110: ...n_Note 4 Quectel_Module_Secondary_SMT_Application_Note Abbreviation Description 3GPP 3rd Generation Partnership Project ADC Analog to Digital Converter ADSP Audio Digital Signal Processor ALS Ambient...

Page 111: ...unications Equipment Data Circuit terminating Equipment DCS Digital Cellular System DL Downlink DPSK Differential Phase Shift Keying DQPSK Differential Quadrature Reference Phase Shift Keying DRX Disc...

Page 112: ...R Full Rate Galileo Galileo Satellite Navigation System EU GFSK Gaussian Frequency Shift Keying GLONASS Global Navigation Satellite System Russia GMSK Gaussian Minimum Shift Keying GND Ground GNSS Glo...

Page 113: ...the year 2000 I O Input Output IImax Maximum Input Load Current IOmax Maximum Output Load Current ISP Image Signal Processor Internet Service Provider LCC Leadless Chip Carrier LCD Liquid Crystal Dis...

Page 114: ...vels MT Mobile Terminating Terminated NavIC Indian Regional Navigation Satellite System N W Net Weight NFC Near Field Communication NTC Negative Temperature Coefficient OTA Over the Air Upgrade OTG On...

Page 115: ...f Hazardous Substances RTC Real Time Clock RTS Request to Send SBAS Satellite Based Augmentation System SCO Synchronous Connection Oriented SD Secure Digital SIMO Single Input Multiple Output SMD Surf...

Page 116: ...mum Input Voltage VImin Absolute Minimum Input Voltage VIHmin Minimum High level Input Voltage VILmax Maximum Low level Input Voltage VOmax Maximum Output Voltage VOHmin Minimum High level Output Volt...

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