GSM/GPRS Module
M85 Hardware Design
M85_Hardware_Design Confidential / Released 43 / 92
Peripheral
TXD
RXD
GND
Module
TXD_AUX
RXD_AUX
GND
Figure 23: Reference design for Auxiliary UART Port
3.7.4. UART Application
The reference design of 3.3V level match is shown as below. If the host is a 3V system, please change
the 5.6K resistor to 10K.
Peripheral
/TXD
/RXD
1K
TXD
RXD
RTS
CTS
DTR
RI
/RTS
/CTS
GPIO
EINT
GPIO
DCD
Module
1K
1K
Voltage level:3.3V
5.6K
5.6K
5.6K
1K
1K
1K
1K
GND
GND
Figure 24: Level Match Design for 3.3V System
The reference design for 5V level match is shown as below. The connection of dotted line can be referred
to the connection of solid line. Please pay attention to the direction of signal. Input dotted line of module
should be referred to input solid line of the module. Output dotted line of module should be referred to
output solid line of the module.
Quectel
Confidential