Quectel FC64E, Hardware Design

Page: 24 / 59

Wi-Fi&Bluetooth Module Series
FC64E_Hardware_Design 23 / 53
PCM_CLK * 45 DI PCM clock
PCM_DOUT * 43 DO PCM data output
V
OL
max = 0.45 V
V
OH
min = 1.35 V
BT_RTS 18 DO
Bluetooth UART
request to send
BT_CTS 19 DI
Bluetooth UART
clear to send
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
BT_RXD 20 DI
Bluetooth UART
receive V
OL
max = 0.45 V
V
OH
min = 1.35 V
BT_TXD 21 DO
Bluetooth UART
transmit
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
BT_WAKE_
HOST
*
41 DO
Bluetooth wakes
up host V
OL
max = 0.45 V
V
OH
min = 1.35 V
HOST_WAKE_
BT
*
22 DI
Host wakes up
Bluetooth
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
RF Antenna Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
ANT_WIFI0 32 AIO
Wi-Fi0 antenna
interface
50 Ω impedance. ANT_WIFI1 36 AIO
Wi-Fi1 antenna
interface
ANT_BT * 28 AIO
Bluetooth
antenna interface
Other Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
WLAN_SLP_CLK 16 DI
WLAN sleep
clock
V
IL
min = -0.3 V
V
IL
max = 0.63 V
V
IH
min = 1.17 V
V
IH
max = 2.1 V
1.8 V power domain.
If unused, keep this
pin open.
SW_CTRL * 23 DO VDD_RF control
V
OL
max = 0.45 V
V
OH
min = 1.35 V
1.8 V power domain.
Active high.
If unused, keep this
pin open.